[SOLVED] ODB++ output help required

HI,

I am using cadstar, the problem is the odb++ which i generate is having more isolation(clearence) at vias when checked,
due to this its loosing connectivity to powerplanes layers, please help,

Thanks in advance...

puneethcp said:

HI,

I am using cadstar, the problem is the odb++ which i generate is having more isolation(clearence) at vias when checked,
due to this its loosing connectivity to powerplanes layers, please help,

Click to expand...

Can you explain more about losing connectivity to powerplanes?

How much more isolation are you talking about?

Your ODB++ output should have the same spacing as
when you use Gerber output, however what you see may not be what you get if your colour/display settings are not showing properly.

Post some pictures of both the design and the ODB++ output, screen shots approx the same size will suffice.

Puneethcp - are you going to reply?
You cannot be helped unless we know more about the problem.

As other have said before - we do not have crystal balls.

sorry for late reply..

Pl. find enclosed the rar file containing the gereber for the board both in 274x format and ODB++ format.

We have seen the 274x format in GC-Prevue, Viewmate and CAM350 and all the three tools are producing the same output visually.

On the ODB+ format, we have viewed it in Viewmate and CAM350 and found differences in GND plane like isolated pads are not filled and additional isolation thereby the connectivity of one pin to the plane is lost.

Pl. go thro' the same and give your feedback.

Can you give examples, component pins etc so that we do not spend ages searching on a wild goose chase?

Also what differences in values are you seeing?

First point, use positive planes not negative, that will help and clear up any problems with the ODB++ output, and is a much better way of working.
Second, you dont put thermal relief on vias, remove it it is not required.
Looking at the files I can see connectivity between the vias and the rest of the copper on ALL power layers be it Gerber or ODB++
Finally without looking at the cadstar design and determining how your templates are set up I can provide no more info, but to solve the problem...
USE POSITIVE power planes and copper pour to flood these planes this will give you more control and avoid any problems.
There is a procedure for working with Cadstar designs and power planes that I'll let Mattylad explain, as I've spent over an hour on this this morning and I'm obn holiday.
Basicly
Set GND andf power layers to "powerplane" during placement and routing, then change to "electrical" and copper pour all temp0lates at the end of the design cycle.

I'm unable to look at the data tonight, somehow I have lost my glasses.

However as marce says, Positive power planes are a much better way of managing power planes within CADSTAR.

back in ye olde days when all we had was a 286 and 4mb or RAM up a powerplane would be made negative so you do not see where the copper is, only where it is not. This gave small files and took less memory. However, as you cannot see where the copper is there could be unconnected pins, very bad connections because they are very thin slivers, big holes in the plane and so on.

Instead, draw a template (on top elec first) and setup everything except for the layer, then the last thing to change is the layer to put it on the powerplane layer. (once it is on the plane layer 1/2 the settings are greyed out because you cannot modify templates on a powerplane) in PREditor you cannot see templates on a powerplane.

Route your board, we prefer the plane layers to be the powerplane type because it autofinished stub routing when the connection to ground is made, an electrical layer will still show a connection and so on.
When the board is routed, change the inner layers to electrical, if you use PREditor make the change in PREditor (The Design Editor will still show them as powerplanes and need changing separately) and in whichever router you use (embedded or preditor) select and pour copper in the templates.

You will be able to see this copper, see where it goes and what is missed out, what areas do not have a copper seed point etc so can modify tracks, add vias from other layers, repour and tidy up your copper pour.

DRC check your board, (If in PReditor change the layers back to powerplanes) and then transfer back to CADSTAR.

Then redo your Gerbers and ODB++ files.

If there is still a difference that you are seeing then please explain on what via locations/nets you are seeing this, there should be no difference between Gerber and ODB++ outputs. (unless you are talking about ISTR a 0.00254mm difference).

And as said - why put thermal relief on vias? connect fully to them - thermal relief is only for when trying to solder them - you do not do that with vias.

I have just written a whole chapter about this issue, seems like I am writing a book on CADSTAR for dummies lol - (and no I cannot post it online).

Finally:

OI MARC - WHERE'S MY SPACEMOUSE???? !!!!! :grin: :wink: :grin: :wink:

Not so finally - have you got any value entered in the clearance and relief columns in your assignments - vias tab?

I'm off to find some cheese - I hear mice like cheese...

- - - Updated - - -

And having just had another look, looking at some vias on the GND layer I can see a difference between Gerber and ODB++ output.

This is because ISTR the Gerber output is designed for a pen, the ODB is 1:1 data. however it is what is called in the trade - a gnats kneecap, nothing that will cause a problem. Remove the thermal relief on the vias and your problem goes away fully.

Told you Mattylad is much more vebose than me.
Spacemouse is sat next to me, been feeding it though so still alive

Thank you for your solutions,
i will try the above said solutions and get back.

thank you guys...