When Clock Gating is done why does the CLOCK has to be gated low

When Clock Gating is done why does the CLOCK has to be gated low ?

Hai dffrtl


Clock gating is done to avoid the waste of power supply... Its is done by having a enable signal.. Mostly using and gate..

Its like switching off of the clock and we can on when we need by having a select signal..

charging and discharging leads to power consumption.. i.e low to high and high to low..

Power consumption is the main reason..

u will find the reason one if u gated the right clock

all clock path will not save power if we gated..


some clock path are so sensitive in that case we need clock at all times so we gated that path low..


Hope its helps a bit.

I know why clock gating is done.
I am looking for answer why when the clock gating is does it has to be gated to low why not high ?

Hi dftrtl
clock gating to be high or low depends on the way flip-flop edge is referred.
If u write a flop with negedge of clock then u go for gated clock to high. When it is posedge of clock then clock gated will be low, in order to turn off the flip-flop. So, that there is no transition b/w states in flip-flop.


hope this helped..

I did not get it. Lets say I have flop with pos edge triggered flops on the clock. What will happpen if I gate clock high instead of low.

What actually clock gating does is it turns off the transition in flip-flop.
let me give an example:
always@(posedge clk)
if (reset)
d<= 'b0;
else
d<= in ;

in the above case there wont be any clock gating becoz when ever there is poedge on clock there is transition.

always@(posedge clk)
if (reset)
d<= 'b0;
else if(en)
d<= in ;

if we take the above case when there is en or reset, then only the flip-flop is enabled with clock or else the clock is turned off to the flip-flop. It is like u won't get the 50% duty cycle on clock.
This turning off the clock(clock gating) is done by tools like Design compiler if clock gating constraints are set.

If gated clock is high for a posedge triggered clock then the flip-flop goes on triggered.
Flip-flops can retain their values without clocks by just giving power supply. So, if we turn off the clock the power is saved.


hope this helped...