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design a continuous divider for pll

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paramis

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hi all,
I want to design a continuous divider for pll.are u think that is possible?
I can't find any information about that from google or IEEE.
 

Hi paramis,

do you mean a noninteger ratio taking any value in some range?
It is possible to have nonintegers multiplier or division frequency ratios using fractional PLLs or dual-modulus prescalers, but te ratios are always rational (N/M, with integers N and M).
With a DDS it would be possible a very wide set of possibilities.
Regards

Z
 

Hi zorro,tnx for your help;)
yes,exactly,I want a noninteger ratio taking any value in some range,for example n(min)=3 , n(max)=30
and 3,3.2,3.4,3.6,.....,28.2,30
and freq of VCO is 100hzmeg-900meghz.
 

Hi paramis,

you can either:
- perform phase comparision at lower frequency using integer ratios frequency dividers for the reference and the VCO
- use a "fractional PLL" (or "fractional-N PLL") with dual modulus prescaler
The best solution depends of the required ratios.
There are many resources in books and in the web.
Regards

Z
 
zorro said:
Hi paramis,

do you mean a noninteger ratio taking any value in some range?
It is possible to have nonintegers multiplier or division frequency ratios using fractional PLLs or dual-modulus prescalers, but te ratios are always rational (N/M, with integers N and M).
With a DDS it would be possible a very wide set of possibilities.



Z
Click to expand...

Hi zorro
tnx alot 4 your help.what is DDS?
Regards
 

DDS = Direct Digital Synthesizer.
See for example technical information in Analog Devices site (there is a tutorial), among other sources.
Regards

Z
 
Hi zorro,
I want to design a Digital PLL.Do you think that is possible ,design a Digital PLL with that specification?can u recommend a book or web?
 
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Hi paramis,

The problem can be the high frequency (900 MHz) if you want a fully digital PLL.
But you can use hybrid techniques (of course digital frequency divider, analog VCO and maybe frequency multiplier, etc.).
Ther is a lot of bibliography on PLL's. Among the books, one classical that I like is Phaselock Techniques by Gardner. The 3rd Edition is by Wiley, 2005.
Regards

Z
 

Who can recommend a way for fractional divide except averaging method?
 

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