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[SOLVED] NOP (no operation) in verilog?

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krishanu007

krishanu007

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I am writing testbench for mu modules,
I am trying to have a block with no operation,
is there any normal NOP operation available for writing a testbench.:shock: ?
it should be there because testbench gets compiled to native code in computer & a processor have a NOP inbuilt.:???:
 

krishanu007 said:
it should be there because testbench gets compiled to native code in computer & a processor have a NOP inbuilt.:???:
Click to expand...

operations in machine languange and high level language are not mapped one by one.

Explain what you are trying to do with 'NOP' and there may be an alternative solution.
 

Verilog is a hardware description language where you actually describe the behavior of the hardware, a NOP would be the equivalent of nothing so it doesn't make sense.

Alex
 

alexan_e said:
Verilog is a hardware description language where you actually describe the behavior of the hardware, a NOP would be the equivalent of nothing so it doesn't make sense.

Alex
Click to expand...
you are true..but only 30% of verilog is synthesizable,other parts are for testing only.I completed my implementation & going on the testbench.
if fork & join makes sense in verilog,then why not NOP.

---------- Post added at 07:57 ---------- Previous post was at 07:56 ----------
lostinxlation said:
operations in machine languange and high level language are not mapped one by one.

Explain what you are trying to do with 'NOP' and there may be an alternative solution.
Click to expand...
so its not there...:(..
ya thats true that theres can be other ways..But if it was there some things could have been made easy.(in TB)
 

First, verilog is not instruction based.. There is no such concept as instruction.
Second, verilog simulation is event driven, and if no event is present, nothing happens and I don't see what the problem is with making some event not happen.

fork&join is useful, NOP not at all.
 

what about
#0;
This is pretty much a "nop" operation. What do you reckon?
 
A NOP instruction is a misnomer, it is an operation that consumes time and power.

A NOP in your testbench either means sending your DUT a NOP instruction, or setting all the pins to a state that makes the DUT do nothing for the period of time you want.
 

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