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simulating output impedance of current cell in cadence?

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rsashwinkumar

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Hello everyone,

I am designing a cascode current steering DAC, and I wish to determine the output impedance of each current cell. I want to know some methods to determine the output impedance of the current cell, which is differential-PMOS current cell. I am using Cadence Virtuoso and tech lib : UMC 180.

Plz help me out...
 

Inject an AC current source with magnitude=1 at your output,ground the input signal and finally measure the output voltage.
You have the output impedance!
Notice that in the whole procedure you should ensure to keep the correct DC operating point in both input and output terminals!
Alternatively you can use a port and use SP analysis in similar way.
 
Thanks jimito13.

But, when i force 1A ac curr., wont the operating conditions of the transistors get affected?

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or u mean the "magnitude = 1", wont affect the circuit conditions, as the AC analysis is purely linear ?
 

No.You set an ideal current source (infinite impedance),so DC op. point won't be affected.

or u mean the "magnitude = 1", wont affect the circuit conditions, as the AC analysis is purely linear ?
Click to expand...

AC magnitude=1 and run small signal (AC) analysis.This is what i mean!
 

Thank you...

How to perform SP analysis ? Can you guide me through that...?
 

In a similar way with AC analysis.You should make use of a power source instead (like a port).
 

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