Explain about peak power analysis ...

Hi,
I am interested in power estimation. Iwanna know about peak power analysis or time based power analysis. please tell me what is done in peak analysis.?

firstly, you need to specify on which netlist you are going to perform the approximation? i mean whether you are performing the PTPX on Gate level netlist or pnr netlist? As the both have its own way of doing it.
Another point to note here is PTPX is just an approximation of the power that you chip/core will take/consume. Thus, Unless and until you know which block(if you are performing chip level) or which part is your core is being utilized maximum at what time. Thus, it is always advisible to perform Average power analysis or so called time based power analysis. In time/Avg power analysis what we do is we take a window where "WE FEEL" the toggling is maximum through out the design for a specific time- 3 milli sec is morethan enough depending upon the complexity of your design. Then we perform the analysis. Why it is called average/time based because, Toggle rate is defined as the number of toggles per clock period. so it will calculate in this manner. Your window of interest's toggling rate will be divided by the clock period.
Where as in peak power we directly take the peak consuming window and perform the analysis.

cheers.

Hi,
Thank you so much. I am performing at rtl level. i wanna know what happens is time based power analysis .. can you please tell what happens in elaboration phase also ? pls explain about time based power analysis at rtl level . thanks in advance

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Hi,
Thank you so much. I am performing at rtl level. i wanna know what happens is time based power analysis .. can you please tell what happens in elaboration phase also ? pls explain about time based power analysis at rtl level . thanks in advance

well i wont give all the answers here i would better recommend you to go and grap PTPX manual and read first 2 chapters. thats morethan enough for you to perform ptpx at gate level netlist. WHich elaboration phase you are talking about? in synthesis?

Well in synthesis, during elaboration- you rtl will get mapped to the GTECH libraries, which are technology independent.These are generic libraries.

cheers

can you please give me the link to that manual. I am not able to find it. It wil be very helpful if u provide it .

Hi please,

find the doc.
cheers