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8-bit cpu altera verilog,help!!

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fadd

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i try to simulate but the wave still not show anything.can someone help me with this?i really dont know how to get a better testbench or maybe my code is wrong?can anyone help..please...really urgent
 

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  • alteracpu.rar
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Instead of sending all your database, can you provide error report which you have produced?

When I saw the database you provided, there is no heirarchy at all. Divide your database into directories for example one for design one for testbench one for log. Then it is easy to debug.
 
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    fadd

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i have done the simulation and now i need to display the output to 7segment...can teach how to code it?
 

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