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Why not use internal Tri-state in ASIC?

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davyzhu

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I found many IP cores (e.g. AMBA bus) don't support internal Tri-state, seems we should avoid tri-state in ASIC design, but why not use it, and what techniques to replace it?

Regards,

Davy Zhu
 

You can use tristate in the top design. tri-state logic need some disable logic in dft.
 

Using Tristate logic reduces the testability of the circuit. A tristate bus should be driven by only one source at a time otherwise due to bus contention the device might get damaged. So the test pattern used for checking the manufacturing defects might cause a bus contention and damage the device.... So one solution is to use a Multiplxed Bus like amba AHB.
 

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    davyzhu

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Though tristate logic issues can be fixed in DFT, it still reduces the test coverage and requires effort. Also, it's not recommended to use tristate logic because nobody can be so sure that the logic is perfectly correct that prevents bus contention from happening on these tri-state buses. When none of the tri-state buffers drives the bus, the bus is somehow floating, which causes huge power consumption. To resolve this, designer should put bus-holder or logically guarantee there's always at least a driver. And .....
In short, no one would like these troubles...
 

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    davyzhu

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1. To facilitate synthesis flow
2. To facilitate STA flow
3. To avoid DFT issues
4. Tri-state long wire is hard to route
 

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    davyzhu

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It causes problems int he DFT, though it is not forbidden in ASIC. All it takes is extra Xiao-Xin...
 

Its not always bad to use internal 3-state bus/es some time you can
use it to just reduce routing conjestion at the cost of other complexities.
 

1. Too slow (R*C increased because R increased when it turns to Hi-Z state).
2. More power consuption (always too much fanout need in the same tri-state wire).
3. DFT issues.
 

CatKing said:
1. Too slow (R*C increased because R increased when it turns to Hi-Z state).
Click to expand...

I am confused with your explain.
I think Tri-state bus is not slow because it's dynamic circuit.
 

tri state can save chip area,

all things have both bad aspect and good aspect.

tri state can cause STA and DFT problems.
 

what's dynamic circuit?
tri-state is?
 

internal tristate can increase power consumption,

and increase DFT's difficulty.




davyzhu said:
I found many IP cores (e.g. AMBA bus) don't support internal Tri-state, seems we should avoid tri-state in ASIC design, but why not use it, and what techniques to replace it?

Regards,

Davy Zhu
Click to expand...
 

Tri-state causes DFT problem because you cannot know exactly the state of output.
 

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