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Inferring latches?????

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jeet_asic

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Why do we infer latch in any circuit ? at what conditions latches must be inferred so that it can helpful ? latches are level sensitive , so if i infer it between two flops having synchronous posedge clock , wht could b change in working of this circuit ? will it help in static timing analysis ????? pls explain why and what will happen ??
 

Latches are used in designs for specific purposes. Often, the use of latches is considered "bad practice" in a synchronous design (and synthesis tools will often give you warnings when latches are inferred).

However, latches are still important. As an example of where you might use one, consider a microprocessor. As it comes out of reset it samples the value on one of its input pins, and uses this to determine what external bus width to use. You can't do this with flip-flops, as there is no clock. A level sensitive latch is required.
Another use of latches is in interrupt controllers, where interrupts might be either edge-sensitive or level-sensitive.

Siskin
 
latches sometimes just "appear"? Transparent latches will appear if you write a combinational process or always block where an output is not assigned under all possible input conditions. In other words, it is possible for one of the inputs to change without affecting the output. In synthesis jargon, this is known as incomplete assignment.
 

Okie. If i take a circuit of two flops (posedge) , master n slave flops connected to synchronous clock having very very small ON time , so there can b case that data coming to slave flop doesn't come at posedge since ON time is very very small , so does it make sense to infer latch between them .
siskin said:
Latches are used in designs for specific purposes. Often, the use of latches is considered "bad practice" in a synchronous design (and synthesis tools will often give you warnings when latches are inferred).

However, latches are still important. As an example of where you might use one, consider a microprocessor. As it comes out of reset it samples the value on one of its input pins, and uses this to determine what external bus width to use. You can't do this with flip-flops, as there is no clock. A level sensitive latch is required.
Another use of latches is in interrupt controllers, where interrupts might be either edge-sensitive or level-sensitive.

Siskin
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