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An integer PLL has integer dividers. If you have a 10 MHz reference crystal, and a 1000 MHz VCO, as an example:
R=10 reference divider
N=1000 VCO divider
So the reference becomes 1 MHz, and the VCO after dividing down is also 1 MHz. Being the same frequency, the PLL can lock the two up, and make the 1000 MHz oscillator be very stable and accurate.
If you program N to change to N=1001, now the VCO moves from 1000 MHz to 1001 MHz.
A fractional PLL can use non integer divisor ratios. If N=1000, you can program it to be N=1000 1/32, 1000 2/32 for example, and get a much smaller step size of 1/32 MHz.
An Integer N means that the Output Frequency can only be an Integer Multiple of the
Reference Frequency. Or you can say that the Output Freq divided by the Ref Freq can
only be an integer.
Fout = N*Fref --> Fout/Fref = N
A Fractional-N is a method to get more Output Frequencies. What they do is,
if they want a N value of say 10.33333 . they will set N = 10 for 10 Clock cycles
(The Reference Clock of the system needs to be high enough make this work),
and N= 11 for 4 Clock cycles with a pattern ~ = :
N = 10 10 11 10 10 11 10 10 11 10 10 11 <-- Set N to this Value, and repeat
Clk = 1 2 3 4 5 6 7 8 9 10 11 12 <- Clock cycles
I think that the most important point is the phase noise reduction of fractional N synthesizers. This is because channel spacing can now be short without the need to increase the N counter. For these reaseon the phase noise which is proportional to 20*LOG(N) can now be reduced with the ability to use short BW channels.
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