problem in Instantiating

hi
i am trying to write a alu verilog code which has two parts.logic and arithmetic.i have written each part and they work correctly but i get errors using them.i want the logicresult for mode=0& arithmeticresult for mode=1.i get this error"Instantiation is not allowed in sequential area except checker instantiation" can anyone help me?
thanks a lot ~_~


module aludesign(
input mode,
input carryin,
input [3:0] inputA,
input [3:0] inputB,
input [1:0] select,
output carryout,
output reg [3:0] result,
wire logicresult,
wire arithmeticresult
);
always@(*)
begin
arithmetic instanceOfArithmetic (inputA,inputB,select,carryin,arithmeticresult,carryout);
logics instanceOfLogic(inputA,inputB,select,logicresult);
case(mode)
1'b0:result = logicresult ;
1'b1:result = arithmeticresult ;

endcase
end
endmodule

(1) Instantiations are not allowed in the procedural blocks (always in this case).
(2) logicresult & arithmeticresult should be the same size as result (wire [3:0] logicresult, arithmeticresult
(3) declare logicresult & arithmeticresult in the module body (not in the port list).

-------------

module aludesign(
input mode,
input carryin,
input [3:0] inputA,
input [3:0] inputB,
input [1:0] select,
output carryout,
output reg [3:0] result
);

wire [3:0] logicresult;
wire [3:0] arithmeticresult;

arithmetic instanceOfArithmetic(inputA,inputB,select,carryin,arithmeticresult,carryout);

logics instanceOfLogic(inputA,inputB,select,logicresult);

always@(*)
begin
case(mode)
1'b0: result = logicresult ;
1'b1: result = arithmeticresult ;
endcase
end

-------------
Good luck!

Hi, i think it may be like this...

module aludesign(
input mode,
input carryin,
input [3:0] inputA,
input [3:0] inputB,
input [1:0] select,
output carryout,
output reg [3:0] result
);
wire logicresult;
wire arithmeticresul;
always@(*)
begin
arithmetic instanceOfArithmetic (inputA,inputB,select,carryin,arithmeticresult,car ryout);
logics instanceOfLogic(inputA,inputB,select,logicresult);
case(mode)
1'b0:result = logicresult ;
1'b1:result = arithmeticresult ;

endcase;
end;
endmodule;

Alosevskoy said:

(1) Instantiations are not allowed in the procedural blocks (always in this case).
(2) logicresult & arithmeticresult should be the same size as result (wire [3:0] logicresult, arithmeticresult
(3) declare logicresult & arithmeticresult in the module body (not in the port list).

-------------

module aludesign(
input mode,
input carryin,
input [3:0] inputA,
input [3:0] inputB,
input [1:0] select,
output carryout,
output reg [3:0] result
);

wire [3:0] logicresult;
wire [3:0] arithmeticresult;

arithmetic instanceOfArithmetic(inputA,inputB,select,carryin,arithmeticresult,carryout);

logics instanceOfLogic(inputA,inputB,select,logicresult);

always@(*)
begin
case(mode)
1'b0: result = logicresult ;
1'b1: result = arithmeticresult ;
endcase
end

-------------
Good luck!

Click to expand...

I had no attention to the second and third problem! i was able to finish my program.thanks alot for your help^^

----
@imbichie
tnx
as Alosevskoy said we cant use Instantiations in blocks.i thought i had to make my program sensitive to all changes...i wrote an always block in in my Test Fixture and it is working properly now.tnx ^^

initial begin
// Initialize Inputs
mode = 0;
carryin = 0;
inputA = 4'b0000;
inputB = 4'b1110;
select = 0;

// Wait 100 ns for global reset to finish
#100;


// Add stimulus here

end
always #60 {mode,select,carryin}={mode,select,carryin}+1;
endmodule