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"Voltage regulators with an external reference feature are advantageous in double data rate DDR, DDR2, and DDR3 SDRAM memory bus supply and termination specifications. For double data rate applications, data is accessed using both the rising and falling edge. These memories use a single power source for their supply voltages (VDD, VTT, & VREF) to ensure that all voltage levels track each other. The length of the memory interconnects, coupled with the multiple stubs that are required for supporting DIMMs result in a signal reflection causing data corruption. The solution to this is typically an active termination scheme called SSTL (Stub Series Termination Logic) used in DDR memory buses. "
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