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Series NMOS question about output voltage and region of operation

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ramyyy

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SO there is another cool NMOS question I cant solve :???:

There are two NMOS connected in series. Both NMOS have Vdd connected to their gates and the output is taken in the middle of the two transistors. Vt = 1v. Vdd = 5v. So what will be the output, what is the region of operation, Can you tell me how it works in the region of operation you are suggesting (I said it will be in saturation region for both) and a lot more crazy questions. Please give all the answers you folks can think of.
 

Assuming that source of bottom transistor is connected to ground and drain of top transistor is connected to VDD (5V). Using NMOS equations in three regions.
1. Vgs < Vt ( Cutoff )
2. Vgs > Vt & Vds < Vgs-Vt ( Linear/Triode )
3. Vgs > Vt & Vds > Vgs-Vt ( Saturation)

Top transistor will be in saturation region and bottom will be in linear. Output at middle will be 4V.
 
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    ramyyy

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Okay so can you please explain why linear? I thought they will be driven to saturation as they are switched on

---------- Post added at 18:45 ---------- Previous post was at 18:39 ----------

okay . Please correct me if wrong. So here for both the nmos vds<< Vgs-vt? for the NMOS connected to ground, If I give a 5v input I will have a 0v output whereas for the one above can you tell me how to calculate?
 


ramyyy said:
SO there is another cool NMOS question I cant solve :???:

There are two NMOS connected in series. Both NMOS have Vdd connected to their gates and the output is taken in the middle of the two transistors. Vt = 1v. Vdd = 5v. So what will be the output, what is the region of operation, Can you tell me how it works in the region of operation you are suggesting (I said it will be in saturation region for both) and a lot more crazy questions. Please give all the answers you folks can think of.
Click to expand...

Hi friend....... See the following link for operation of NMOS...
and please elaborate your question with diagram...

MOS Transistors – Operation - Electronic Circuits and Diagram-Electronics Projects and Design

---------- Post added at 12:07 ---------- Previous post was at 12:06 ----------
ramyyy said:
SO there is another cool NMOS question I cant solve :???:

There are two NMOS connected in series. Both NMOS have Vdd connected to their gates and the output is taken in the middle of the two transistors. Vt = 1v. Vdd = 5v. So what will be the output, what is the region of operation, Can you tell me how it works in the region of operation you are suggesting (I said it will be in saturation region for both) and a lot more crazy questions. Please give all the answers you folks can think of.
Click to expand...

Hi friend....... See the following link for operation of NMOS...
and please elaborate your question with diagram...

MOS Transistors – Operation - Electronic Circuits and Diagram-Electronics Projects and Design
 

I will read the working but the figure is given in this - **broken link removed** in page 2 fig b, short Vd and Vg.
 

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