Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Verilog Code for floating point adder:
Procedure for this stage:
Take the Two 7-bit exponential binary numbers (a and b) and subtracting them. Let the result be named as ‘ediff’. We have to shift (logical right shift) the mantissa of the second number (f2 10digits) based on the...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
