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Recent content by vigneshg05

  1. V

    looking for study partner in Candence

    Hi kabaleevisu, What your doubt in DDR signal. can you pls tell i will help you
  2. V

    looking for study partner in Candence

    Hi Friends, I think i can help you at my best Past 6 years i am using allegro. you can throw your question i will try to answer it.
  3. V

    duplicating vias wiyh same net name.

    Which software are you using? If allegro means just click copy icon go to option tab in that there is a option "Retain net of vias" select it and paste the vias where ever you required the same net will maintain.
  4. V

    [SOLVED] Solder mask defined pads

    Can you please tell what's the Pitch of your WLCSP package and send some snapshot of your socket. Reg assembly Issue: Pls check with your assembly house depends upon her capability only we will decide.
  5. V

    Design entry CIS is not openinig

    Just check in Task Manager>>Process capture is running if yes try it to close after that open capture in Run as administrator permission and check.
  6. V

    [SOLVED] How to create a footprint in Orcad ?

    Re: Footprint thank you very much for the tutorial. One more help do you have the tutorial for allegro PCB Editor.
  7. V

    [SOLVED] How to create a footprint in Orcad ?

    I am new to orcad.i want to create footprint there is any userguide or tutorial is avilable to create footprint.
  8. V

    [SOLVED] How to set the board stackup thickness and layer in Allegro PCB Editor?

    How to set the board stackup thickness and layer in allegro pcb editor. Regards, vignesh.G
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