Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Hi!
Microstrip lines also have a capacitance with respect to ground plane. Could you give us more details about the geometry of your problem?
I noticed that you via is almost touching ground plane. What clearing space do you have? Proximity between via and gorund plane increase your...
Hi!
You'll have to join it with microstrip Tee (MTEE at Microwave Office) and short microstrip lines. Be cautious, you have to simulate also the parasitics of the real inductances and capacitances, because it changes your response. Sometimes the manufacturers give you those touchstones files...
That's it.
By definition
Which means that you left open port 2 (current is 0), so you only sees an open line.
Checking the smith chart you will see that S(1,1) in centered at 50 Ohms.
Hi,
You can design Wilkinson divider at smaller frequencies and differents Z0, using two transmission lines of lambda/4 length and impedance sqrt(2)*Z0, and a resistance of 2*Z0, as is shown below:
But as @FvM said , that is very unpractical. Imagine make it with coaxial cables of PTFE. At...
Hi!
I saw that in the application they are using a push-pull configuration of this transistor (2 GaN transistors). Is your Load Pull for one or two transistors? you have to take into account this because it will change the output form. This configurations also helps with distorsion issues...
Hi!
What datasheet are you using? I can't find the one with load pull measurements.
You can use a Z_Source_Fund similar to datasheet's one. Z_Source_Fund=0.005+j*0 looks very low.
What time domain signal are you using?
By the way, what application will have this amplifier?
regards
OK, maybe your load pull is ok. But I don't see Zs and Zl values included. In Term 2 your Z has to be ZL (not 50Ohm) and at your generator Z has to be Zs.
Hi,
It seems that in your schematic you don't put the input matching network and the output matching network.
You have to matched the 50Ohm to your Zs (conjugate matching), and also do a power matching to ZL at the output of the transistor.
Also, How did you do the load pull? According to...
Hello,
At 800MHz you have a really poor matching (-0.35dB), practically a full reflection. Maybe your problem is in the input matching network. When the signal not enters the amplifier you couldn't have gain. Could you send a schematic of the circuit?
By the waye, where is the LNA located...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
