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In those 3 cases, I don't have any capacitor so there is no DC current that can flow (only parasitic capacitor due to the line/diode package). There shift are thus due to current flow to the ground?
Ok, I see. In terms of fabrication, I can only do via as i am doing actually. The diameter size...
I don't know if I understood correctly what you mean't but is what I made in the 11th post of this thread (Jan 24th)? I made circuit without and with vias and looked at the impedance. As we can see on the results, there is a resistance ''offset" with the via. My interpretation: adding the diode...
We can compare it with the 3 experimental data. I made three circuits, one doing my via with silver paste, and the two others with copperstrip (but with more or less solder).
For the 3.91 permittivity, I trust this value at 80%. To be sure, I changed my simulation setting with the permittivity...
Here is my workspace.
EDIT: Seems like I cannot upload the file here, it doesn't appear. Please, find it on the following link: https://we.tl/t-9hfjoWWJJ1
Hello,
I checked that I had the same results using an other calibrated VNA. I think that I can now conclude that the issue is due to fabrication. For a last check, I did some experiments with the diode and how I do my VIAs (1 mm diameter, with silver paste or copper strip with solder).
What...
I will do that. IF I understand clearly what you are saying, I should connect my VNA to an oscilloscope and look at the signal generated at one frequency (let say 2.45GHz). At this point, I should observe a sine signal.
I have already tried to connect a prototype to an other VNA and I observed...
I am using the diode model described in the datasheet:
And then, I co-simulate everything in a schematic using the diode component and the board EM-model. How can I check that the correct bias point is use during my LSSP simulation?
Hello,
I am updating this thread with new experiments results I have. I am suspecting that the frequency shift is due to the VIAs of my circuit. I did 3 different circuits:
case: A line with an open stub and the diode I am using (HSMS 285B).
case: A line with a short stub and the diode I am...
Hello all,
here are some updates (red is simulation blue is experimental).
First, this is my simulations parameter (my frequency plan is DC to 6 GHz and adaptive type). I also add a TML (zero length) with a ref offset of -7 mm for the input port:
Then, this is my results with my VNA...
I didn't put any via on the second design. Shall I modify the feed line length through the port definition using a TRL with a length of my SMA connector?
Here is my substrate definition (and its datasheet ):
I have calibrated the VNA also and the waves are disappearing, nevertheless, we can still observe this shift.
And the archive of my work:
Hello all,
I do fabricate rectifier using SMD diode and capacitor for a project and I found a lot of inaccuracy between simulation and fabrication. For example, I do have a shift as visible here (blue is experimental):
I tried to simplify my circuit to see if it's coming from my substrate...
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