Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
If you want to do device parameter extraction for taking a job as a device modeling engineer( which I have been doing for 15 years) than get a book like Tsividus MOSFET and get the BSIM3, BSIM4 or PSP modeling document and get the software like ICCAP, UTMOST III/IV, BSIMPRO and get their...
Than best for you is to look for a relatively older process model library. Do an online search and you will get that. All the text books on analog circuit design should have that also
Please let me know where I can find the lecture note of UT Austin analog circuit design lecture note by prof. Shouli Yan. It should be in his personal website link, but failed to locate that.
**broken link removed**
thanks,
Kazi
Re: Does anyone know what is the real gm equation in BSIM4 m
I believe that it is a first order derivative from the Id value and BSIM4 or BSIm3v3 does not model this. Typically you will be much better to do this by simulation and use the simulated value of the devices.
Hope that will help.
Does anyone have access to a simulation deck for cyclic analog to digital
data converter. How to do the whole circuit(data converter) simulation of the data converter characteristics ?
Please see if you can help.
Kazi
I did model development for silvaco around 2000 and now doing the compact modeling for smartspice. So far , silvaco was trying to deliver the colone of hspice at a much cheaper rate. So, the device model and the convergences are same bit by bit.
However, in the past silvaco's smartspice has...
what is pclm in bsim3 model
Typically this parameter is extracted for output resistance modeling and should not
be used for any other one. Effects seen from varying this parameter should be minor
due to vds variation.
Hope that will help.
K
Can anyone please explain why high input impedence is needed in the input stage of op amp and low output impedence is needed in output stage ?
Thanks
Khabib
This is the first time that I am going to design an comparator and very new to analog design.
1. What do I need to simulate for comparator as for opamp, we usually do open loop gain,
slew rate, PSRR, CMRR etc.
2. How to choose the device geometry ? For opamp it is like for matching and other...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.