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Recent content by jayasree jayaraj

  1. J

    Ground plane issue in merging of two board files in allegro

    I have changed the net names and made it the same for two PCBs. But still, all ground pins which is attached to the ground plane lost their connection in PCB2. when I merged two PCB files, the ground was missing in the imported PCB file.
  2. J

    Ground plane issue in merging of two board files in allegro

    In PCB1 the net name of the ground is GND and in PCB2 the net name of the ground is BATT-. Is that the issue?
  3. J

    Ground plane issue in merging of two board files in allegro

    Hi, I tried to merge two PCB's in allegro 17.4 software. I export the subdrawing of PCB2 and import it in my PCB1 and make it as a single file. But when I import my PCB2 subdrawing(CLIP) file, all ground pins which is attached with ground plane lost its connection in PCB2.I have added a ground...
  4. J

    Ground plane issue in merging of two board files in allegro

    Hi, I tried to merge two PCB's in allegro software. I export the subdrawing of PCB2 and import it in my PCB1 and make it as a single file. But when I import my PCB2 subdrawing(CLIP) file, all ground pins which is attached with ground plane lost its connection in PCB2.I have added a ground plane...
  5. J

    8layer PCB design

    hi, I have FPGA in my design..so how to add signal layers and how to route in those areas?
  6. J

    8layer PCB design

    Hi, I am trying to design a 8layer board using cadence Allegro. As I did only 2layer design I don't have much idea about more layers.can you please provide any tutorial or guidelines for 8layer designing.
  7. J

    Footprint with vias in allegro

    Hi, I did as per your suggestion.but as my thermal pad is smd and via is throughole i am getting drc error of thru pin to smd pin spacing.In my constraint manager i had set spacing of 0.127mm. I have attached my footprint below.
  8. J

    Footprint with vias in allegro

    Hi, How to add thermal vias in thermal pad of footprints in allegro? Can you please suggest any videos or steps of adding thermal vias in footprints
  9. J

    Rf antenna design

    Hi, I have designed an antenna using CSTstudiosuite 2019 software and also I did gerbers for my design.But i am not getting outline file in my gerber files.My fabricator is asking for outline seperately. As i am new in this i don't know how to take outline from my design in gerbers. please tell...
  10. J

    Footprint with vias in allegro

    Hi, My doubt is how to add vias in footprint.I mean in .dra file how can we add vias?
  11. J

    Footprint with vias in allegro

    Hi, I am trying to create a footprint for LAN8742A-CZ-TR. I want to add vias in pads of footprint.I don't know how to create footprint with vias in allegro. Please tell how to create footprints with via using cadence allegro. i have attached datasheet of this component.
  12. J

    [Moved] PIC1897j60 programmer

    Hi, In this pic1897j60 controller,there are lots of power pins (VDD pins like 17,37,59).Does it works if 3.3V has not reached on any one of the pin?I mean if only pin number 86 is not connected to 3.3V, does it work?
  13. J

    [Moved] PIC1897j60 programmer

    Hi, Can you please provide the basic schematics of pic1897j60?I am totally confused in some capacitor and resistor values in basic schematics of pic1897j60.
  14. J

    [Moved] PIC1897j60 programmer

    please mention part number of 32.768KHz cyrstal
  15. J

    [Moved] PIC1897j60 programmer

    In the below attached image,please suggest part number of cystal(X2-37Khz).
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