Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Hi,
I am designing a mixer in ADS and using mixer design guide, available in ADS to set up the testbench. In particular, I am using this template:
In data view, it has a lot of equations to calculate all sorts of things like gain, impedances, spectra, etc.
I am interested in optimizing my...
Hi, I am cross posting this from Reddit because I did not get a full answer there.
I am starting to design a multistage differential LNA in a CMOS process. The textbooks (e.g. by Voinigescu) suggest that the first stage must always have lowest NF based on Frii's equation of cascades amplifier...
Hi,
I am working in AWR and realized a BPF with coupled microstrip lines.
So, I have two schematics:
a) Ideal (designed with AWR iFilter tool)
b) Realized with microstrip technology (values were optimized)
Now, here is the resulting graphs
dashed regions are optimization goals that were...
For (c), I've come to the understanding that total number of variables must be (480 Yee cells) * (6 variables per cell). These 6 variables are Ex, Ey, Ez, Hx, Hy, Hz.
for (d), I computed as to how long it takes for the wave with slowest phase velocity (er=8 material) to propagate across the...
Hello,
I am trying to solve this problem:
I can't quite get (c) and (d).
Here is my solution:
I computed (a) and (b) I believe correctly. But, not sure how to approach (c) and (d). What do we mean by variables? Is it those 6 E and H variables per Yee cell?
About (d), I simply don't know...
Hi, another problem I'd like some clarification on, although I have my own answers.
When downsampling is performed, sampling theorem should still be fulfilled. So, in the first problem, we can downsample to fs=4kHz and we still fulfill the sampling theorem (2000*2 = 4 kHz). And the...
Thanks for the reply.
I'll answer my own question:
The function f is real-valued iff the FT of f is Hermitian (conjugate symmetric).
f is Hermitian iff:
a) real part of f is even.
b) imaginary part of f is odd.
Summary: for a function f to be real:
a) The amplitude spectrum must have even...
One of the test questions had these problems:
So, I need to tell whether the signal real or complex from its DFT magnitude and phase spectra.
DFT formula is:
How should I even think about this problem? I did some experiments in Matlab and got even more confused. Any hints?
Hi,
I am doing a layout of a NAND gate.
I built the following schematic:
The problem is with the NMOS pull-down network so here's a close up:
From this screenshot, it is clearly visible that the upper NMOS's and lower NMOS's bodies are connected together and it is connected to Vss (i.e...
I have the following code:
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.NUMERIC_STD.ALL;
USE IEEE.STD_LOGIC_MISC.ALL;
ENTITY hazard_unit_forwards IS
PORT (
i_Rs1E, i_Rs2E : IN STD_LOGIC_VECTOR(4 downto 0);
i_RdM, i_RdW : IN STD_LOGIC_VECTOR(4 downto 0)...
Hi,
I built this little 4-bit T-flip-flop counter and I really don't need the Qbar outputs from the flip flops. However, I can't just leave them unconnected because of the warnings.
What is the practice with such pins when designing circuits? I presume I would have to make them not-connected...
How can these names match? In fact, now matter what I name the pin, it has the same warning, for example:
Can anyone explain what is going on?
This is the offending schematic:
1637765000
I tried this:
And the warning is:
Damn, that looks like a very standardized way to solve this type of problems which I'd like to master. In my circuit theory class, we did not cover 2-port theory and I never bothered to do it myself. Time to do it. What software is that? My guess is Jupyter notebook (?)
I will go through this...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.