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Recent content by Gerry_robotics

  1. Gerry_robotics

    Mentor Graphics - Precision RTL Synthesis ERROR with Altera MAX+PLUS II Place & Route

    Mentor Graphics - Precision RTL Synthesis ERROR with Altera MAX+PLUS II Place & Route Hi Folks, I'm running into some compiling/synthesis errors using the Mentor Graphics Precision RTL Synthesis software. I'm hoping there are some real Mentor Graphics Gurus out there that can shed some light...
  2. Gerry_robotics

    [SOLVED] DynIP Client Control Panel not opening on Windows 7 - From dynip.com

    Hi Folks, I have installed a program called "DynIP Client" Version 5.51 for Windows 7 which I downloaded from the Dynip.com website. I have tried several times to install it on my Windows 7 PC and the programs "Client control panel" will not open. The Dynip Client Icon is visible in the...
  3. Gerry_robotics

    [SOLVED] ModelSim 10.0 - Is it possible to have a TCL script run automatically at Startup ?

    Finally!!! Fantastic!!!! :) Megkel. Thanks so much. How did you figure this out? Right on! thanks for letting me know. :) Cheers! -Gerry
  4. Gerry_robotics

    Xilinx Old school software "XACT" or "ViewLogic4"

    Hey Folks, I've run into a snag here.... I dug out the old school Xilinx "Xact" software boxes from storage, and I even found the hardware Dongle which was what I was most concerned about finding in order to revive this old software that came out in the early 90's. Just looking to mess...
  5. Gerry_robotics

    FTDI USB UART - FT245RL D2XX Driver Help !!

    Hey Folks, 8-) I’m a college Electronics Student working on an USB interface project and I have Interfaced a USB cable to my FTDI "FT245RL" TSOP UART chip. My Windows XP machine has detected the UART without problems and I Proceeded to install the provided D2XX Drivers. It is now being...
  6. Gerry_robotics

    [SOLVED] ModelSim 10.0 - Is it possible to have a TCL script run automatically at Startup ?

    Any Ideas how I could make this work ? -Gerry
  7. Gerry_robotics

    VHDL - How to convert an 10-Bit Vector input, to an 8-Bit Vector output ?

    Hi Folks, I have a project that I'm working on and I need to take the first 8-Bits from a 10-Bit Vector input Port, and then copy those 8-Bits to one of my 8-Bit Vector Output ports. So essentially, I guess I'm converting a 10-Bit vector to an 8-Bit Vector. I was looking at the...
  8. Gerry_robotics

    [SOLVED] ModelSim 10.0 - Is it possible to have a TCL script run automatically at Startup ?

    Ok, so for instance I normally type in a few TCL commands like the following once ModelSIm loads up. My Code: view wave apply_button_adder wave controls right green black Run_50_uS {run 50} apply_button_adder wave controls right red white Run_100_uS {run 100} apply_button_adder wave controls...
  9. Gerry_robotics

    [SOLVED] ModelSim 10.0 - Is it possible to have a TCL script run automatically at Startup ?

    Hi Folks, I'm wondering if it is possible to somehow edit the default settings or edit a system file in Modelsim, in order to have a list of TCL commands be executed automatically at Startup when Modelsim loads. Perhaps have a few TCL "do commands" saved in script.txt file that could run...
  10. Gerry_robotics

    [SOLVED] Mentor Graphics HDL Designer - Modelsim Simulation ERROR !

    I also looked at the Task Log window after running the Design Checker and it came up with these ERROR Messages: ---------- Post added at 03:32 ---------- Previous post was at 02:47 ---------- Solved the Problem. It was in fact because the port names between other VHDL BLocks in the design...
  11. Gerry_robotics

    [SOLVED] Mentor Graphics HDL Designer - Modelsim Simulation ERROR !

    Hi Folks, I'm using Mentor Graphics HDL Designer and I have final Symbol with 9 separate VHDL blocks interconnected. I have tried to run a simulation in ModelSim but I get the following Warning that prevents the Simulator from loading it. Here is the Warning Message below: I'm really stumped...
  12. Gerry_robotics

    [SOLVED] VHDL - VGA Horizontal Decoder - Error "Latches Inferred for net 'OUTPUT' "

    Re: VHDL - VGA Horizontal Decoder - Error "Latches Inferred for net 'OUTPUT' " That is Awesome !! Now I see what you meant. It's redundant to repeat the same "assign to '0' " statements, when you can just do it once at the beginning. Very cool. I love this Language ! And I'm only...
  13. Gerry_robotics

    [SOLVED] VHDL - VGA Horizontal Decoder - Error "Latches Inferred for net 'OUTPUT' "

    Re: VHDL - VGA Horizontal Decoder - Error "Latches Inferred for net 'OUTPUT' " Right On ! Thanks for all your suggestions guys, I tried a few things and then finally managed to get it to go through the Design Checker without any Latches occurring. Here is my Final Code below: Thanks again...
  14. Gerry_robotics

    [SOLVED] VHDL - VGA Horizontal Decoder - Error "Latches Inferred for net 'OUTPUT' "

    Re: VHDL - VGA Horizontal Decoder - Error "Latches Inferred for net 'OUTPUT' " Right on! Thanks a lot. I didn't know that was necessary, I thought that the "When Others" took care of that. But now that you mention it, that makes sense. I'll try that and see what it does. Thanks again for...
  15. Gerry_robotics

    [SOLVED] VHDL - VGA Horizontal Decoder - Error "Latches Inferred for net 'OUTPUT' "

    Hi Folks, I'm working on a VHDL VGA signal generation Project. The following code is for generating the Horizontal Sync signal and other timing requirements for my VGA project but I do in fact still get Errors if I run it through the Design Checker in HDL Designer software. It does compile...
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