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At such a low frequency, seems like you could let the micro
execute any PWM and drive a basic MOSFET driver from a
logic output pin.
There are isolating MOSFET drivers now which might offer
some interconnection possibilities (like any-to-any cell
leveling) used with a FET or just for their...
5V supply won't get you out of UVLO.
Look into more modern PMICs in CMOS that can drive logic-level MOSFETs and like 5V input (POL DC-DC). ONSemi, TI, ST, et al, use disti selector tools?
The output high and low side switches want their
gates driven to make H, L and Z. You need a trivial
couple of gates for that decode and of course the
drive taper chain (inverters).
Used to be that "NTE" would sell individual bagged "replacement"
transistors at ham radio & TV repair places, had a faty cross
reference book and so on.
No idea whether they have survived the modern era or in what
form, where.
For older types often the discrete mfrs would have their own...
Check your starting assumption, that your new product lot will receive any processing outside the mature process production envelope. Aside from a fluke (or a real sloppy fab choice) the odds are 3- or 4-sigma low. Probably more like 3 in the fab and 4 in the PDK.
The fab rats know how to bend the shot to get short L thin Tox low VT or whatever. Somebody does the DoX and they execute. Your over-calendar-time-and-oopsie-plus-sandbag "corners" are way way wider than a single lot's scatter.
Are you saying you want to correct offsets which have a
source external to the comparator?
Correcting a continuous-time comparator might need you to
ping-pong a pair of autozero comparators, use one while
zeroing the other. But autozero tends to have a lower frequency
bound, set by bleed-out...
A good while back I was building a digital modulator
engine (AWG as EPROM+DAC, and a mixer) and I
found some "one time programmable EPROM" parts
which had no window, plastic packaged, so no erase
but they were faster (like 75ns vs 150ns?) and dirt
cheap (basically 256K PROM).
If your...
I start with searching the error text, to find the rule code; then follow the logic backwards through the deck until you can identify the layer precursors that make the logical args.
Drill into the DRC deck and see what defines "chip edge".
It may not be prBoundary. Might be "bulk" or "scribe" or
something like that.
First step to debugging is understanding what the rule
is supposed to be telling you. Do not assume developer
clarity or communications skills, flowed all the...
Unfortunately programmers on the market will tend to move
with the times and maybe we are losing coverage of "classic"
parallel EPROMs. And then you lose 5V operation, going modern,
which then obviates using 74HC/AC logic for playing around.
A cascade of rip-up "for want of a nail".
You might...
A reality-vs-simulation background issue could be
electrolytic capacitor ESL/ESR, which all alone might
make the "reservoir" have too skinny a pipe to cover
switching transient demand and let the at-pins Vcc
sag into UVLO territory. In simulation an ideal cap
will work, but what you can get in...
If you are willing to wait you can use direct sunlight.
I have had decent luck, though not with your specific
memory P/N, using the Willem programmer on UV
EPROMs.
Looks to me like you are set up for, and maybe not escaping,
"hiccup mode". I see what looks like a boot winding diode-
OR'd to Vcc, and a skinnky 50K pullup. So every time you
cross UVLO rising, you get one "yip" out the back which (you
hope) will pump the bypass cap hard enough to not hit...
The future is about problems, parts are the answer
to real world problems. Do I know whether anybody
wants another op amp years from now? No, not 'til
I can figure out what future systems might impose
differently for requirements. You can bet on more bits
at higher rate for less power at zero...
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