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Recent content by big_fudge98

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    Using Viabars

    Hi all, I am using a 90 nm SiGe process from GlobalFoundries. I noticed that the PDK provides 'Viabar'. This is basically a continuous wall, made of via layer, and not discrete vias. However, I have never seen them being used before. So, my question is, are there any considerations that I...
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    Transmission line simulation in HFSS 3D Layout

    Hi, I am trying a microstrip transmission line simulation in HFSS. I imported the GDS file, and setup the ports. I am using HFSS simulator (not Planar EM) and Phi Meshing. However, I see my results changing with horizontal padding. The following is my transmission line. I am designing it for...
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    Slow-wave coplanar waveguide simulation

    Hi all, I am designing a slow-wave coplanar waveguide for a mm-wave IC, in CMOS process. I was wondering, can these transmission lines be simulated using a 2.5D simulator like EMX or Momentum? Or does it require something like HFSS? Thanks.
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    Antenna rules in GF 45 RFSOI

    Hi, I have a question about resolving antenna errors in GF45RFSOI process. I could not find any antenna diodes in this process. So for resolving antenna errors, I added a 'bitieres'. From what I understand, bitieres is a contact from M1 to the substrate. So if we use bitieres for multiple...
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    Importing layout from Cadence Virtuoso to HFSS/CST

    Are you aware of any tutorials/docs online explaining this?
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    Importing layout from Cadence Virtuoso to HFSS/CST

    Hi, Is it possible to import a layout (GDS) from cadence virtuoso to an EM simulator like HFSS or CST Microwave studio? I would like to do some circuit-antenna co-design.
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    Plotting phase spectrum in cadence virtuoso

    Thanks. I am doing transient actually. I found a solution here: https://community.cadence.com/cadence_technology_forums/f/custom-ic-design/48487/plotting-phase-spectrum.
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    Plotting phase spectrum in cadence virtuoso

    Hi, Is it possible to plot the phase spectrum in cadence virtuoso? The dft tool in the calculator plots the amplitude spectrum, but I was wondering if its possible to plot phase vs frequency. I use IC618.
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    Negative Resistance Element

    Hi, I am using Cadence Virtuoso IC618 with spectre 19 simulator. I wish to experiment a bit with negative resitance. I know how to design a negative resistance circuit (cross-coupled pair, Colpitts oscillator etc), but I was wondering if there is an element in the analoglib which I can use...
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    Via Simplification in ADS Momentum

    That's a good point. I'll keep that in mind. Thanks. As someone coming from a low-frequency circuit design background, handling return current has been a real pain, haha.
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    Via Simplification in ADS Momentum

    Hi, thanks for the reply. My frequency of interest is 200 GHz-250 GHz. I am using Momentum RF if the structure that I wish to EM simulate is less than half a wavelength. I use momentum microwave only when my structures are large. Also, I do not have any radiating elements on-chip.
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    Via Simplification in ADS Momentum

    Hi, I am using ADS Momentum 2021 in Cadence Virtuoso IC618 environment for EM simulations. My simulations are taking way too long and hence I have turned on via simplifications (local via arrays keeping areas and boundaries). My question is, does this affects my simulation accuracy a lot...
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    Substrate contacts in FDSOI process

    Thanks, Dominik for the very detailed answer. I understand a lot more now. 1613990858 Hi, this is quite interesting. And you are right, the process is actually SOIOS. I can reach the bottom substrate if I draw a particular layer. The BOX would simply be excluded at that region. Is this why...
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    Substrate contacts in FDSOI process

    Hi Dominik, Thanks for your answer. I am using 22 nm FDSOI from GF. Like you said, I have access to a mmwave library. The transistros in this are 5 or 6 terminal devices with G,S,D, body, well and substrate terminals. Based on my understanding, a buried oxide layer separates the whole...
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    Substrate contacts in FDSOI process

    Hi all. I am currently designing a chip that is to be operated in mm-wave frequencies. Usually, in mm-wave layouts, we keep as many substrate contacts as possible (to tap the substrate to the ground). However, in this design, I am using an FDSOI process. In this process, I am unable to find a...
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