For signoff engineers in the integrated circuit (IC) industry, mastering Design Rule Checking (DRC) in physical verification is crucial for ensuring high-quality and reliable designs. This blog explores advanced DRC methodologies, specific case studies, and the latest cutting-edge technologies in digital design.
Importance of DRC in Ensuring IC Quality
Design Rule Checking (DRC) is a vital step in the IC design flow, ensuring that the physical layout adheres to manufacturing process constraints. Effective DRC helps identify potential issues early, reducing costly iterations and enhancing overall product quality.Essential Techniques in DRC
1. Hierarchical DRCHierarchical DRC involves verifying design rules at different levels of the design hierarchy, allowing for efficient and scalable verification of complex SoCs.
Case Study:
A team at Nvidia implemented hierarchical DRC using customized scripts integrated with Verdi. This approach allowed them to check logic functions, clocking, timing, power, and DFT at both RTL and gate levels. The integration with Verdi provided a GUI that linked error reports directly to the design context, significantly improving debug efficiency.
Implementation:
Block-Level Verification:Conduct DRC at the block level to simplify top-level verification.
Tool Integration:Use tools like Verdi for seamless integration of hierarchical DRC with design context.
2. Automated DRC Fixes
Automated DRC tools like BindKey's Rapid Design Clean (RDC) and Rapid Design Fix (RDF) offer on-the-fly DRC error detection and correction, enhancing productivity.
Case Study:
BindKey's RDC and RDF tools were used in conjunction with Cadence Virtuoso to perform online DRC checks and automatic fixes. These tools provided graphical hints, enforced rules, and notified users of errors, significantly reducing verification time and improving yield.
Implementation:
Online DRC Checks:Implement tools that offer real-time DRC checks during design.
Automated Fixes:Use tools like RDC and RDF for automatic error correction.
Advanced Techniques in DRC
1. Physically Aware DRCPhysically aware DRC incorporates physical design constraints into the verification process, ensuring accurate detection and correction of errors related to placement and routing.
Case Study:
A semiconductor company used Synopsys Hercules for physically aware DRC, integrating the tool with their Milkyway database. This integration allowed for direct read/write access, improving the efficiency of DRC processes and ensuring accurate error detection.
Implementation:
Physical Constraints Integration: Use DRC tools that integrate physical design constraints.
Database Integration:Leverage databases like Milkyway for direct interaction with DRC tools.
2. Power-Aware DRC
Power-aware DRC involves checking for design rule violations that could affect power integrity, essential for low-power and high-performance designs.
Case Study:
Mentor Graphics' Calibre was used to perform power-aware DRC checks, ensuring that designs met stringent power requirements without sacrificing performance. The tool's robust algorithms provided accurate and fast verification, helping designers maintain power integrity across complex designs.
Implementation:
Power Integrity Checks:Implement DRC tools that focus on power-related rule checks.
Low-Power Techniques:Use techniques like multi-threshold voltage cells and clock gating to ensure compliance with power rules.