In this post, I will explain the 3 stages of the pipeline microprocessors namely the Fetch Unit, Decode Unit, and Execute Unit. So Let's start designing based on the specification given below.
Stage-1: Fetch Unit
Fetch Unit comprises half-word addressable instruction memory. It takes PC as input and gives the instruction as an output. PC is also incremented by PC=PC+1.
Stage-2: Decode Unit
Decode Unit reads the fetched instruction and decodes the address of two source operands and destination register. Also, it generates the immediate data. Register Bank reads the value of source operands (Rs1 and Rs2) at negative level of the clock, and writes the data in the destination register (Rd) at positive level of clock. Control Unit uses 4-bit opcode bits to determine the type of instruction.
Stage-3: Execute Unit
ALU Control Unit uses the type of instruction generated by the control unit and generates a 2-bit ALUOP (ALU Operation) signal. ALU Module uses the ALUOP generated by ALU Control Unit to perform the operation on source operands. Write Back Unit using the type of instruction from the control unit write the output data from the ALU module in the destination register of the register bank.
Instruction Format:
OPCODE
R-type = 4’d1
I-type = 4’d2
Func3
ADD and ADDI=3’d0
SUB and SUBI=3’d1
AND and ANDI=3’d2
OR and ORI=3’d3
So now Start coding,
Complete code available from my website so check out it and before running that code don't forget to put here attached two files in your main directory.
For code click here
Stage-1: Fetch Unit
Fetch Unit comprises half-word addressable instruction memory. It takes PC as input and gives the instruction as an output. PC is also incremented by PC=PC+1.
Stage-2: Decode Unit
Decode Unit reads the fetched instruction and decodes the address of two source operands and destination register. Also, it generates the immediate data. Register Bank reads the value of source operands (Rs1 and Rs2) at negative level of the clock, and writes the data in the destination register (Rd) at positive level of clock. Control Unit uses 4-bit opcode bits to determine the type of instruction.
Stage-3: Execute Unit
ALU Control Unit uses the type of instruction generated by the control unit and generates a 2-bit ALUOP (ALU Operation) signal. ALU Module uses the ALUOP generated by ALU Control Unit to perform the operation on source operands. Write Back Unit using the type of instruction from the control unit write the output data from the ALU module in the destination register of the register bank.
Instruction Format:
OPCODE
R-type = 4’d1
I-type = 4’d2
Func3
ADD and ADDI=3’d0
SUB and SUBI=3’d1
AND and ANDI=3’d2
OR and ORI=3’d3
So now Start coding,
Complete code available from my website so check out it and before running that code don't forget to put here attached two files in your main directory.
For code click here