LSNI-BT02
The previous post discussed a simple transistor based inverting MOSFET driver ie. LSIN-BT01. It consisted of a Level-Shifter stage followed by a transistorized totem-pole output stage. This post discusses a NON-INVERTING version of the previous driver. For quick reference this driver is abbreviated LSNI-BT02, meaning Low Side, Non-Inverting, BJT based driver. For more information on abbreviation scheme, refer to https://www.edaboard.com/blog/1928/
Much of the functioning of both these drivers remain the same, except the fact that LSIN-BT01 produces an inverting output and LSNI-BT02 produces a non-inverting output. In fact, LSNI-BT02 can be thought of as LSIN-BT01 preceded by an extra inverting stage. This additional stage comes at the cost of a higher propagation delay and ofcourse a higher price. Nevertheless, the performance still is in par with the commercially available IC-based drivers.
A snapshot of the specification and the driver circuit is attached below as a picture. The detailed analysis of the circuit can be found in the PDF file (also attached below)
The previous post discussed a simple transistor based inverting MOSFET driver ie. LSIN-BT01. It consisted of a Level-Shifter stage followed by a transistorized totem-pole output stage. This post discusses a NON-INVERTING version of the previous driver. For quick reference this driver is abbreviated LSNI-BT02, meaning Low Side, Non-Inverting, BJT based driver. For more information on abbreviation scheme, refer to https://www.edaboard.com/blog/1928/
Much of the functioning of both these drivers remain the same, except the fact that LSIN-BT01 produces an inverting output and LSNI-BT02 produces a non-inverting output. In fact, LSNI-BT02 can be thought of as LSIN-BT01 preceded by an extra inverting stage. This additional stage comes at the cost of a higher propagation delay and ofcourse a higher price. Nevertheless, the performance still is in par with the commercially available IC-based drivers.
A snapshot of the specification and the driver circuit is attached below as a picture. The detailed analysis of the circuit can be found in the PDF file (also attached below)
