Change log for lmb_v10


13.4 - Changes in VHDL/Verilog/Netlist sources (.vhd, .v, .ngc, .edn)

Changes in v2.00.b introduced in 13.4


New Features:
  • None
Resolved issues:
  • None
Known Issues / Limitations:
  • None

13.4 - Changes in tool interface files (.mpd)


  • Added "OPTION HDL = VHDL" to ensure that the HDL language is shown correctly.

13.4 - Changes in Tcl script files associated with core (.tcl)


  • None

13.4 - Changes in documentation associated with core


  • None

13.2 - Changes in VHDL/Verilog/Netlist sources (.vhd, .v, .ngc, .edn)

Changes in v2.00.b introduced in 13.2


New Features:
  • Removed the usage of SRL16 and a 16 clock cycle reset after configuration
Resolved issues:
  • None
Known Issues / Limitations:
  • Will only do 1 clock cycle reset directly after configuration if proc_sys_reset is not used. Earlier version always did a 16 clock cycle long reset even if proc_sys_reset already performs this.

13.2 - Changes in tool interface files (.mpd)


  • None

13.2 - Changes in Tcl script files associated with core (.tcl)


  • None

13.2 - Changes in documentation associated with core


  • None

13.1 - Changes in VHDL/Verilog/Netlist sources (.vhd, .v, .ngc, .edn)

Changes in v2.00.a introduced in 13.1


New Features:
  • New signals to handle ECC protection of LMB BRAM; Sl_Wait, LMB_Wait, Sl_CE, LMB_Wait, Sl_UE, LMB_UE
Resolved issues:
  • None
Known Issues / Limitations:
  • None

13.1 - Changes in tool interface files (.mpd)


  • New signals added; Sl_Wait, LMB_Wait, Sl_CE, LMB_Wait, Sl_UE, LMB_UE

13.1 - Changes in Tcl script files associated with core (.tcl)


  • None

13.1 - Changes in documentation associated with core


  • Updated with respect to new signals

12.2 - Changes in VHDL/Verilog/Netlist sources (.vhd, .v, .ngc, .edn)

Changes in v1.00.a introduced in 12.2


New Features:
  • None
Resolved issues:
  • None
Known Issues / Limitations:
  • None

12.2 - Changes in tool interface files (.mpd)


  • Added option to run .tcl procedure in order to TIG reset input

12.2 - Changes in Tcl script files associated with core (.tcl)


  • Added procedure to TIG reset input for AXI systems

12.2 - Changes in documentation associated with core


  • None

12.1 - Changes in VHDL/Verilog/Netlist sources (.vhd, .v, .ngc, .edn)

Changes in v1.00.a introduced in 12.1


New Features:
  • None
Resolved issues:
  • None
Known Issues / Limitations:
  • None

12.1 - Changes in tool interface files (.mpd)


  • PORT LMB_Rst default connecting changed to LMB_Rst

12.1 - Changes in Tcl script files associated with core (.tcl)


  • None

12.1 - Changes in documentation associated with core


  • None

10.1.2 - Changes in VHDL/Verilog/Netlist sources (.vhd, .v, .ngc, .edn)

Changes in v1.00.a introduced in 10.1.2


New Features:
  • None
Resolved issues:
  • None
Known Issues / Limitations:
  • None

10.1.2 - Changes in tool interface files (.mpd)


  • None

10.1.2 - Changes in Tcl script files associated with core (.tcl)


  • None

10.1.2 - Changes in documentation associated with core


  • Added QPro Virtex-4 Hi-Rel, QPro Virtex-4 Rad Tolerant, and Spartan-3AN FPGA support.