ctrl_access.c

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00001 /*This file is prepared for Doxygen automatic documentation generation.*/
00016 
00017 /* Copyright (c) 2009 Atmel Corporation. All rights reserved.
00018  *
00019  * Redistribution and use in source and binary forms, with or without
00020  * modification, are permitted provided that the following conditions are met:
00021  *
00022  * 1. Redistributions of source code must retain the above copyright notice,
00023  * this list of conditions and the following disclaimer.
00024  *
00025  * 2. Redistributions in binary form must reproduce the above copyright notice,
00026  * this list of conditions and the following disclaimer in the documentation
00027  * and/or other materials provided with the distribution.
00028  *
00029  * 3. The name of Atmel may not be used to endorse or promote products derived
00030  * from this software without specific prior written permission.
00031  *
00032  * 4. This software may only be redistributed and used in connection with an Atmel
00033  * AVR product.
00034  *
00035  * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
00036  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
00037  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE EXPRESSLY AND
00038  * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
00039  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
00040  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
00041  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
00042  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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00044  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00045  */
00046 
00047 //_____ I N C L U D E S ____________________________________________________
00048 
00049 #include "config.h"
00050 #include "ctrl_access.h"
00051 
00052 
00053 //_____ D E F I N I T I O N S ______________________________________________
00054 
00055 #if (ACCESS_MEM_TO_RAM == ENABLED)
00056    #include "modules/file_system/fat.h"
00057 #endif
00058 
00059 #if (LUN_0 == ENABLE)
00060    U8 code  lun0_name[]=LUN_0_NAME;
00061 #endif
00062 #if (LUN_1 == ENABLE)
00063    U8 code  lun1_name[]=LUN_1_NAME;
00064 #endif
00065 #if (LUN_2 == ENABLE)
00066    U8 code  lun2_name[]=LUN_2_NAME;
00067 #endif
00068 #if (LUN_3 == ENABLE)
00069    U8 code  lun3_name[]=LUN_3_NAME;
00070 #endif
00071 #if (LUN_4 == ENABLE)
00072    U8 code  lun4_name[]=LUN_4_NAME;
00073 #endif
00074 #if (LUN_5 == ENABLE)
00075    U8 code  lun5_name[]=LUN_5_NAME;
00076 #endif
00077 #if (LUN_6 == ENABLE)
00078    U8 code  lun6_name[]=LUN_6_NAME;
00079 #endif
00080 #if (LUN_7 == ENABLE)
00081    U8 code  lun7_name[]=LUN_7_NAME;
00082 #endif
00083 #if (LUN_USB == ENABLE)
00084    U8 code  lunusb_name[]=LUN_USB_NAME;
00085 #endif
00086 
00087 //*************************************************************************
00088 //**** Listing of commun interface ****************************************
00089 //*************************************************************************
00090 
00095 U8    get_nb_lun()
00096 {
00097 #if   (LUN_USB == ENABLED)
00098    return   (MAX_LUN + Lun_usb_get_lun());
00099 #else
00100    return   MAX_LUN;
00101 #endif
00102 }
00103 
00104 
00109 U8    get_cur_lun()
00110 {
00111    return   0; //TODO a specific management
00112 }
00113 
00114 
00128 Ctrl_status mem_test_unit_ready( U8 lun )
00129 {
00130    switch( lun )
00131    {
00132 #     if (LUN_0 == ENABLE)
00133       case LUN_ID_0:
00134       return Lun_0_test_unit_ready();
00135       break;
00136 #     endif
00137 #     if (LUN_1 == ENABLE)
00138       case LUN_ID_1:
00139       return Lun_1_test_unit_ready();
00140       break;
00141 #     endif
00142 #     if (LUN_2 == ENABLE)
00143       case LUN_ID_2:
00144       return Lun_2_test_unit_ready();
00145       break;
00146 #     endif
00147 #     if (LUN_3 == ENABLE)
00148       case LUN_ID_3:
00149       return Lun_3_test_unit_ready();
00150       break;
00151 #     endif
00152 #     if (LUN_4 == ENABLE)
00153       case LUN_ID_4:
00154       return Lun_4_test_unit_ready();
00155       break;
00156 #     endif
00157 #     if (LUN_5 == ENABLE)
00158       case LUN_ID_5:
00159       return Lun_5_test_unit_ready();
00160       break;
00161 #     endif
00162 #     if (LUN_6 == ENABLE)
00163       case LUN_ID_6:
00164       return Lun_6_test_unit_ready();
00165       break;
00166 #     endif
00167 #     if (LUN_7 == ENABLE)
00168       case LUN_ID_7:
00169       return Lun_7_test_unit_ready();
00170       break;
00171 #     endif
00172 #     if (LUN_USB == ENABLE)
00173       default:
00174       return Lun_usb_test_unit_ready(lun - LUN_ID_USB);
00175       break;
00176 #     endif
00177    }
00178    return   CTRL_FAIL;
00179 }
00180 
00181 
00191 Ctrl_status mem_read_capacity( U8 lun , U32 _MEM_TYPE_SLOW_ *u32_last_sector )
00192 {
00193    switch( lun )
00194    {
00195 #     if (LUN_0 == ENABLE)
00196       case LUN_ID_0:
00197       return Lun_0_read_capacity( u32_last_sector );
00198       break;
00199 #     endif
00200 #     if (LUN_1 == ENABLE)
00201       case LUN_ID_1:
00202       return Lun_1_read_capacity( u32_last_sector );
00203       break;
00204 #     endif
00205 #     if (LUN_2 == ENABLE)
00206       case LUN_ID_2:
00207       return Lun_2_read_capacity( u32_last_sector );
00208       break;
00209 #     endif
00210 #     if (LUN_3 == ENABLE)
00211       case LUN_ID_3:
00212       return Lun_3_read_capacity( u32_last_sector );
00213       break;
00214 #     endif
00215 #     if (LUN_4 == ENABLE)
00216       case LUN_ID_4:
00217       return Lun_4_read_capacity( u32_last_sector );
00218       break;
00219 #     endif
00220 #     if (LUN_5 == ENABLE)
00221       case LUN_ID_5:
00222       return Lun_5_read_capacity( u32_last_sector );
00223       break;
00224 #     endif
00225 #     if (LUN_6 == ENABLE)
00226       case LUN_ID_6:
00227       return Lun_6_read_capacity( u32_last_sector );
00228       break;
00229 #     endif
00230 #     if (LUN_7 == ENABLE)
00231       case LUN_ID_7:
00232       return Lun_7_read_capacity( u32_last_sector );
00233       break;
00234 #     endif
00235 #     if (LUN_USB == ENABLE)
00236       default:
00237       return Lun_usb_read_capacity( lun - LUN_ID_USB, u32_last_sector );
00238       break;
00239 #     endif
00240    }
00241    return   CTRL_FAIL;
00242 }
00243 
00244 
00251 U8 mem_sector_size( U8 lun )
00252 {
00253 # if (LUN_USB == ENABLE)
00254    return (lun < LUN_ID_USB) ? 1 : Lun_usb_read_sector_size(lun- LUN_ID_USB);
00255 #else
00256    return 1;
00257 #endif
00258 }
00259 
00260 
00270 Bool  mem_wr_protect( U8 lun )
00271 {
00272    switch( lun )
00273    {
00274 #     if (LUN_0 == ENABLE)
00275       case LUN_ID_0:
00276       return Lun_0_wr_protect();
00277       break;
00278 #     endif
00279 #     if (LUN_1 == ENABLE)
00280       case LUN_ID_1:
00281       return Lun_1_wr_protect();
00282       break;
00283 #     endif
00284 #     if (LUN_2 == ENABLE)
00285       case LUN_ID_2:
00286       return Lun_2_wr_protect();
00287       break;
00288 #     endif
00289 #     if (LUN_3 == ENABLE)
00290       case LUN_ID_3:
00291       return Lun_3_wr_protect();
00292       break;
00293 #     endif
00294 #     if (LUN_4 == ENABLE)
00295       case LUN_ID_4:
00296       return Lun_4_wr_protect();
00297       break;
00298 #     endif
00299 #     if (LUN_5 == ENABLE)
00300       case LUN_ID_5:
00301       return Lun_5_wr_protect();
00302       break;
00303 #     endif
00304 #     if (LUN_6 == ENABLE)
00305       case LUN_ID_6:
00306       return Lun_6_wr_protect();
00307       break;
00308 #     endif
00309 #     if (LUN_7 == ENABLE)
00310       case LUN_ID_7:
00311       return Lun_7_wr_protect();
00312       break;
00313 #     endif
00314 #     if (LUN_USB == ENABLE)
00315       default:
00316       return Lun_usb_wr_protect(lun - LUN_ID_USB);
00317       break;
00318 #     endif
00319    }
00320    return   CTRL_FAIL;
00321 }
00322 
00323 
00330 Bool  mem_removal( U8 lun )
00331 {
00332    switch( lun )
00333    {
00334 #     if (LUN_0 == ENABLE)
00335       case LUN_ID_0:
00336       return Lun_0_removal();
00337       break;
00338 #     endif
00339 #     if (LUN_1 == ENABLE)
00340       case LUN_ID_1:
00341       return Lun_1_removal();
00342       break;
00343 #     endif
00344 #     if (LUN_2 == ENABLE)
00345       case LUN_ID_2:
00346       return Lun_2_removal();
00347       break;
00348 #     endif
00349 #     if (LUN_3 == ENABLE)
00350       case LUN_ID_3:
00351       return Lun_3_removal();
00352       break;
00353 #     endif
00354 #     if (LUN_4 == ENABLE)
00355       case LUN_ID_4:
00356       return Lun_4_removal();
00357       break;
00358 #     endif
00359 #     if (LUN_5 == ENABLE)
00360       case LUN_ID_5:
00361       return Lun_5_removal();
00362       break;
00363 #     endif
00364 #     if (LUN_6 == ENABLE)
00365       case LUN_ID_6:
00366       return Lun_6_removal();
00367       break;
00368 #     endif
00369 #     if (LUN_7 == ENABLE)
00370       case LUN_ID_7:
00371       return Lun_7_removal();
00372       break;
00373 #     endif
00374 #     if (LUN_USB == ENABLE)
00375       default:
00376       return Lun_usb_removal();
00377       break;
00378 #     endif
00379    }
00380    return   CTRL_FAIL;
00381 }
00382 
00383 
00390 #ifdef __GNUC__
00391 U8* mem_name( U8 lun )
00392 #else
00393 U8 code*  mem_name( U8 lun )
00394 #endif
00395 {
00396    switch( lun )
00397    {
00398 #     if (LUN_0 == ENABLE)
00399       case LUN_ID_0:
00400       return (U8 code*)lun0_name;
00401       break;
00402 #     endif
00403 #     if (LUN_1 == ENABLE)
00404       case LUN_ID_1:
00405       return (U8 code*)lun1_name;
00406       break;
00407 #     endif
00408 #     if (LUN_2 == ENABLE)
00409       case LUN_ID_2:
00410       return (U8 code*)lun2_name;
00411       break;
00412 #     endif
00413 #     if (LUN_3 == ENABLE)
00414       case LUN_ID_3:
00415       return (U8 code*)lun3_name;
00416       break;
00417 #     endif
00418 #     if (LUN_4 == ENABLE)
00419       case LUN_ID_4:
00420       return (U8 code*)lun4_name;
00421       break;
00422 #     endif
00423 #     if (LUN_5 == ENABLE)
00424       case LUN_ID_5:
00425       return (U8 code*)lun5_name;
00426       break;
00427 #     endif
00428 #     if (LUN_6 == ENABLE)
00429       case LUN_ID_6:
00430       return (U8 code*)lun6_name;
00431       break;
00432 #     endif
00433 #     if (LUN_7 == ENABLE)
00434       case LUN_ID_7:
00435       return (U8 code*)lun7_name;
00436       break;
00437 #     endif
00438 #     if (LUN_USB == ENABLE)
00439       default:
00440       return (U8 code*)lunusb_name;
00441       break;
00442 #     endif
00443    }
00444    return 0;   // Remove compiler warning
00445 }
00446 
00447 
00448 
00449 //*************************************************************************
00450 //**** Listing of READ/WRITE interface ************************************
00451 //*************************************************************************
00452 
00453 
00465 Ctrl_status    memory_2_usb( U8 lun , U32 addr , U16 nb_sector )
00466 {
00467    Ctrl_status status=CTRL_FAIL;
00468 
00469    switch( lun )
00470    {
00471 #     if (LUN_0 == ENABLE)
00472       case LUN_ID_0:
00473       status = Lun_0_read_10(addr , nb_sector);
00474       break;
00475 #     endif
00476 #     if (LUN_1 == ENABLE)
00477       case LUN_ID_1:
00478       status = Lun_1_read_10(addr , nb_sector);
00479       break;
00480 #     endif
00481 #     if (LUN_2 == ENABLE)
00482       case LUN_ID_2:
00483       status = Lun_2_read_10(addr , nb_sector);
00484       break;
00485 #     endif
00486 #     if (LUN_3 == ENABLE)
00487       case LUN_ID_3:
00488       status = Lun_3_read_10(addr , nb_sector);
00489       break;
00490 #     endif
00491 #     if (LUN_4 == ENABLE)
00492       case LUN_ID_4:
00493       status = Lun_4_read_10(addr , nb_sector);
00494       break;
00495 #     endif
00496 #     if (LUN_5 == ENABLE)
00497       case LUN_ID_5:
00498       status = Lun_5_read_10(addr , nb_sector);
00499       break;
00500 #     endif
00501 #     if (LUN_6 == ENABLE)
00502       case LUN_ID_6:
00503       status = Lun_6_read_10(addr , nb_sector);
00504       break;
00505 #     endif
00506 #     if (LUN_7 == ENABLE)
00507       case LUN_ID_7:
00508       status = Lun_7_read_10(addr , nb_sector);
00509       break;
00510 #     endif
00511    }
00512    return   status;
00513 }
00514 
00526 Ctrl_status    usb_2_memory( U8 lun , U32 addr , U16 nb_sector )
00527 {
00528    Ctrl_status status=CTRL_FAIL;
00529 
00530    switch( lun )
00531    {
00532 #     if (LUN_0 == ENABLE)
00533       case LUN_ID_0:
00534       status = Lun_0_write_10(addr , nb_sector);
00535       break;
00536 #     endif
00537 #     if (LUN_1 == ENABLE)
00538       case LUN_ID_1:
00539       status = Lun_1_write_10(addr , nb_sector);
00540       break;
00541 #     endif
00542 #     if (LUN_2 == ENABLE)
00543       case LUN_ID_2:
00544       status = Lun_2_write_10(addr , nb_sector);
00545       break;
00546 #     endif
00547 #     if (LUN_3 == ENABLE)
00548       case LUN_ID_3:
00549       status = Lun_3_write_10(addr , nb_sector);
00550       break;
00551 #     endif
00552 #     if (LUN_4 == ENABLE)
00553       case LUN_ID_4:
00554       status = Lun_4_write_10(addr , nb_sector);
00555       break;
00556 #     endif
00557 #     if (LUN_5 == ENABLE)
00558       case LUN_ID_5:
00559       status = Lun_5_write_10(addr , nb_sector);
00560       break;
00561 #     endif
00562 #     if (LUN_6 == ENABLE)
00563       case LUN_ID_6:
00564       status = Lun_6_write_10(addr , nb_sector);
00565       break;
00566 #     endif
00567 #     if (LUN_7 == ENABLE)
00568       case LUN_ID_7:
00569       status = Lun_7_write_10(addr , nb_sector);
00570       break;
00571 #     endif
00572    }
00573    return   status;
00574 }
00575 
00577 #if (ACCESS_MEM_TO_RAM == ENABLED)
00578 
00591 Ctrl_status    memory_2_ram( U8 lun , const U32 _MEM_TYPE_SLOW_ addr , U8 _MEM_TYPE_SLOW_ *ram )
00592 {
00593 
00594    Ctrl_status status=CTRL_FAIL;
00595 
00596    switch( lun )
00597    {
00598 #     if (LUN_0 == ENABLE)
00599       case LUN_ID_0:
00600       status = Lun_0_mem_2_ram(addr , ram);
00601       break;
00602 #     endif
00603 #     if (LUN_1 == ENABLE)
00604       case LUN_ID_1:
00605       status = Lun_1_mem_2_ram(addr , ram);
00606       break;
00607 #     endif
00608 #     if (LUN_2 == ENABLE)
00609       case LUN_ID_2:
00610       status = Lun_2_mem_2_ram(addr , ram);
00611       break;
00612 #     endif
00613 #     if (LUN_3 == ENABLE)
00614       case LUN_ID_3:
00615       status = Lun_3_mem_2_ram(addr , ram);
00616       break;
00617 #     endif
00618 #     if (LUN_4 == ENABLE)
00619       case LUN_ID_4:
00620       status = Lun_4_mem_2_ram(addr , ram);
00621       break;
00622 #     endif
00623 #     if (LUN_5 == ENABLE)
00624       case LUN_ID_5:
00625       status = Lun_5_mem_2_ram(addr , ram);
00626       break;
00627 #     endif
00628 #     if (LUN_6 == ENABLE)
00629       case LUN_ID_6:
00630       status = Lun_6_mem_2_ram(addr , ram);
00631       break;
00632 #     endif
00633 #     if (LUN_7 == ENABLE)
00634       case LUN_ID_7:
00635       status = Lun_7_mem_2_ram(addr , ram);
00636       break;
00637 #     endif
00638 #     if (LUN_USB == ENABLE)
00639       default:
00640       return  Lun_usb_mem_2_ram(lun - LUN_ID_USB,addr , ram);
00641 #     endif
00642    }
00643    return   status;
00644 }
00645 #endif // ACCESS_MEM_TO_RAM == ENABLED
00646 
00647 
00648 
00649 #if (ACCESS_MEM_TO_RAM==ENABLE)
00650 
00663 Ctrl_status    ram_2_memory( U8 lun , const U32 _MEM_TYPE_SLOW_ addr , U8 _MEM_TYPE_SLOW_ * ram )
00664 {
00665    Ctrl_status status=CTRL_FAIL;
00666 
00667    switch( lun )
00668    {
00669 #     if (LUN_0 == ENABLE)
00670       case LUN_ID_0:
00671       status = Lun_0_ram_2_mem(addr , ram);
00672       break;
00673 #     endif
00674 #     if (LUN_1 == ENABLE)
00675       case LUN_ID_1:
00676       status = Lun_1_ram_2_mem(addr , ram);
00677       break;
00678 #     endif
00679 #     if (LUN_2 == ENABLE)
00680       case LUN_ID_2:
00681       status = Lun_2_ram_2_mem(addr , ram);
00682       break;
00683 #     endif
00684 #     if (LUN_3 == ENABLE)
00685       case LUN_ID_3:
00686       status = Lun_3_ram_2_mem(addr , ram);
00687       break;
00688 #     endif
00689 #     if (LUN_4 == ENABLE)
00690       case LUN_ID_4:
00691       status = Lun_4_ram_2_mem(addr , ram);
00692       break;
00693 #     endif
00694 #     if (LUN_5 == ENABLE)
00695       case LUN_ID_5:
00696       status = Lun_5_ram_2_mem(addr , ram);
00697       break;
00698 #     endif
00699 #     if (LUN_6 == ENABLE)
00700       case LUN_ID_6:
00701       status = Lun_6_ram_2_mem(addr , ram);
00702       break;
00703 #     endif
00704 #     if (LUN_7 == ENABLE)
00705       case LUN_ID_7:
00706       status = Lun_7_ram_2_mem(addr , ram);
00707       break;
00708 #     endif
00709 #     if (LUN_USB == ENABLE)
00710       default:
00711       return  Lun_usb_ram_2_mem(lun - LUN_ID_USB,addr , ram);
00712       break;
00713 #     endif
00714    }
00715    return   status;
00716 }
00717 
00718 
00724 U8    stream_mem_to_mem( U8 src_lun , U32 src_addr , U8 dest_lun , U32 dest_addr , U16 nb_sector )
00725 {
00726    Ctrl_status status=CTRL_FAIL;
00727    fat_cache_flush();
00728    while(nb_sector)
00729    {
00730       status = memory_2_ram( src_lun , src_addr , fs_g_sector );
00731       if( status != CTRL_GOOD )
00732          break;
00733       status = ram_2_memory( dest_lun , dest_addr , fs_g_sector );
00734       if( status != CTRL_GOOD )
00735          break;
00736       src_addr++;
00737       dest_addr++;
00738       nb_sector--;
00739    }
00740    fat_cache_reset();
00741    return (status != CTRL_GOOD)? ID_STREAM_ERR:0;
00742 }
00743 
00744 
00754 Ctrl_status stream_state( U8 Id )
00755 {
00756    return CTRL_GOOD;
00757 }
00758 
00765 U16 stream_stop( U8 Id )
00766 {
00767    return 0;
00768 }
00769 
00770 #endif   // ACCESS_RAM_TO_MEM == ENABLED
00771 

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