pll_drv.h

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00014 /* Copyright (c) 2009 Atmel Corporation. All rights reserved.
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00043 
00044 #ifndef PLL_DRV_H
00045 #define PLL_DRV_H
00046 
00047 //_____ I N C L U D E S ____________________________________________________
00048 
00052 //_____ M A C R O S ________________________________________________________
00053 
00057 #define PLLx06          ( (0<<PLLP2) | (1<<PLLP1) | (1<<PLLP0) )
00058 
00059 #ifdef __ICCAVR__
00060    #if (defined(__AT90USB1287__) || defined(__AT90USB1286__)) 
00061       #define PLLx03          ( (1<<PLLP2) | (0<<PLLP1) | (1<<PLLP0) )
00062    #elif (defined(__AT90USB647__) || defined(__AT90USB646__) || defined(__ATmega32U6__))
00063       #define PLLx03          ( (1<<PLLP2) | (1<<PLLP1) | (0<<PLLP0) )
00064    #else
00065       #error TARGET should be defined 
00066    #endif
00067 #elif defined __GNUC__
00068    #if (defined(__AVR_AT90USB1287__) || defined(__AVR_AT90USB1286__)) 
00069       #define PLLx03          ( (1<<PLLP2) | (0<<PLLP1) | (1<<PLLP0) )
00070    #elif (defined(__AVR_AT90USB647__) || defined(__AVR_AT90USB646__) || defined(__AVR_ATmega32U6__))
00071       #define PLLx03          ( (1<<PLLP2) | (1<<PLLP1) | (0<<PLLP0) )
00072    #endif
00073 #else // Other compiler
00074    #error Compiler unknow
00075 #endif
00076 
00077 
00080 #define Start_pll(clockfactor)   (PLLCSR = ( clockfactor  | (1<<PLLE)  ))
00082 #define Is_pll_ready()           (PLLCSR & (1<<PLOCK) )
00084 #define Wait_pll_ready()         while (!(PLLCSR & (1<<PLOCK)))
00086 #define Stop_pll()               (PLLCSR  &= (~(1<<PLLE)),PLLCSR=0 ) 
00087 #ifdef CUSTOM_PLL_START_AUTO
00088    #define    Pll_start_auto()   CUSTOM_PLL_START_AUTO
00089 #else
00090 
00091       // Start the PLL in autofactor mode
00092       // regarding FOSC define
00093 #if   (FOSC==8000)
00094    #define Pll_start_auto()   Start_pll(PLLx06)
00095 #elif (FOSC==16000)
00096    #define Pll_start_auto()   Start_pll(PLLx03)
00097 #else
00098    #error   "FOSC should be defined with 8000KHz or 16000KHz in config.h"
00099 #endif
00100 #endif
00101 
00103 
00105 #endif  // PLL_DRV_H
00106 
00107 

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