wdt_drv.c

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00013 
00014 /* Copyright (c) 2009 Atmel Corporation. All rights reserved.
00015  *
00016  * Redistribution and use in source and binary forms, with or without
00017  * modification, are permitted provided that the following conditions are met:
00018  *
00019  * 1. Redistributions of source code must retain the above copyright notice,
00020  * this list of conditions and the following disclaimer.
00021  *
00022  * 2. Redistributions in binary form must reproduce the above copyright notice,
00023  * this list of conditions and the following disclaimer in the documentation
00024  * and/or other materials provided with the distribution.
00025  *
00026  * 3. The name of Atmel may not be used to endorse or promote products derived
00027  * from this software without specific prior written permission.
00028  *
00029  * 4. This software may only be redistributed and used in connection with an Atmel
00030  * AVR product.
00031  *
00032  * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
00033  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
00034  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE EXPRESSLY AND
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00041  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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00043 
00044 //_____ I N C L U D E S ____________________________________________________
00045 
00046 #include "config.h"
00047 #include "wdt_drv.h"
00048 
00049 //_____ M A C R O S ________________________________________________________
00050 
00051 #ifdef __GNUC__
00052 #define  Wdt_reset_instruction()    wdt_reset()
00053 #else
00054 #define  Wdt_reset_instruction()    __watchdog_reset()
00055 #endif
00056 
00057 
00060 #ifndef __GNUC__
00061    // Ignored if IAR compiler optimization option "Always do cross call optimization" is enabled
00062    #pragma optimize=none 
00063 #endif
00064 void wdtdrv_disable(void)
00065 {
00066    U8 save_int=Get_interrupt_state();
00067    Disable_interrupt();
00068 #ifdef  __GNUC__
00069    Ack_wdt_reset();
00070    wdt_disable();
00071 #else
00072    Ack_wdt_reset();
00073    Wdt_reset_instruction();
00074    WDTCSR = (1<<WDCE) | (1<<WDE);
00075    WDTCSR = 0x00;
00076 #endif
00077    if(save_int) { Enable_interrupt(); }
00078 }
00079 
00080 
00085 #ifndef __GNUC__
00086    // Ignored if IAR compiler optimization option "Always do cross call optimization" is enabled
00087    #pragma optimize=none 
00088 #endif
00089 void wdtdrv_enable( U8 timeout )
00090 {
00091    U8 save_int=Get_interrupt_state();
00092    Disable_interrupt();
00093 #ifdef  __GNUC__
00094    Ack_wdt_reset();
00095    wdt_enable(timeout);
00096 #else
00097    timeout = (1<<WDE)| (timeout & 0x08 ? (1<<WDP3) : 0x00) | (timeout & 0x07);
00098    Disable_interrupt();
00099    Wdt_reset_instruction();
00100    WDTCSR = (1<<WDCE) | (1<<WDE);
00101    WDTCSR = timeout;
00102 #endif
00103    if(save_int) { Enable_interrupt(); }
00104 }
00105 
00106 
00111 #ifndef __GNUC__
00112    // Ignored if IAR compiler optimization option "Always do cross call optimization" is enabled
00113    #pragma optimize=none 
00114 #endif
00115 void wdtdrv_interrupt_enable( U8 timeout )
00116 {
00117    U8 save_int=Get_interrupt_state();
00118 #ifdef  __GNUC__
00119    Ack_wdt_reset();
00120     __asm__ __volatile__ (  \
00121         "in __tmp_reg__,__SREG__" "\n\t"    \
00122         "cli" "\n\t"    \
00123         "wdr" "\n\t"    \
00124         "sts %0,%1" "\n\t"  \
00125         "out __SREG__,__tmp_reg__" "\n\t"   \
00126         "sts %0,%2" \
00127         : /* no outputs */  \
00128         : "M" (_SFR_MEM_ADDR(_WD_CONTROL_REG)), \
00129         "r" (_BV(_WD_CHANGE_BIT) | _BV(WDE)), \
00130         "r" ((uint8_t) ((timeout & 0x08 ? _WD_PS3_MASK : 0x00) | \
00131             _BV(WDIE) | (timeout & 0x07)) ) \
00132         : "r0"  \
00133     );
00134 #else
00135    timeout = (1<<WDIE)| (timeout & 0x08 ? (1<<WDP3) : 0x00) | (timeout & 0x07);
00136    Disable_interrupt();
00137    Wdt_reset_instruction();
00138    WDTCSR = (1<<WDCE) | (1<<WDE);
00139    WDTCSR = timeout;
00140 #endif
00141    if(save_int) { Enable_interrupt(); }
00142 }
00143 
00144 
00149 #ifndef __GNUC__
00150    // Ignored if IAR compiler optimization option "Always do cross call optimization" is enabled
00151    #pragma optimize=none 
00152 #endif
00153 void wdtdrv_interrupt_reset_enable( U8 timeout )
00154 {
00155    U8 save_int=Get_interrupt_state();
00156    Disable_interrupt();
00157 #ifdef  __GNUC__
00158    Ack_wdt_reset();
00159     __asm__ __volatile__ (  \
00160         "in __tmp_reg__,__SREG__" "\n\t"    \
00161         "cli" "\n\t"    \
00162         "wdr" "\n\t"    \
00163         "sts %0,%1" "\n\t"  \
00164         "out __SREG__,__tmp_reg__" "\n\t"   \
00165         "sts %0,%2" \
00166         : /* no outputs */  \
00167         : "M" (_SFR_MEM_ADDR(_WD_CONTROL_REG)), \
00168         "r" (_BV(_WD_CHANGE_BIT) | _BV(WDE)), \
00169         "r" ((uint8_t) ((timeout & 0x08 ? _WD_PS3_MASK : 0x00) | \
00170             _BV(WDE) | _BV(WDIE) | (timeout & 0x07)) ) \
00171         : "r0"  \
00172     );
00173 #else
00174    timeout = (1<<WDIE)|(1<<WDE)| (timeout & 0x08 ? (1<<WDP3) : 0x00) | (timeout & 0x07);
00175    Disable_interrupt();
00176    Wdt_reset_instruction();
00177    WDTCSR = (1<<WDCE) | (1<<WDE);
00178    WDTCSR = timeout;
00179 #endif
00180    if(save_int) { Enable_interrupt(); }
00181 }
00182 

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