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How to avoid antenna effect in my poly configuration?

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analayout

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hi guys
if i connect the poly as follows
m4>m3>m2>m1>poly
is this will cause antenna problem
if it occures how can i avoid it
regards
analayout
 

Re: Antenna Effect

It might cause a problem in silicon, the poly when fabricated is not connected to silicon or any connection. You can put a reverse biased diode connected to the input poly to nullify the effect.
 

Re: Antenna Effect

if a situation will cause antenna effect depends on the used process, and you can use DRC to check it
if antenna effect, use a higher layer metal to bridge the large area metal layer in some appropriate locations
 

Re: Antenna Effect

depends on area( anttenna ratio ) and technology used.
 

Re: Antenna Effect

What do you mean by connecting poly as m4>m3>m2>m1>poly?

You have a poly line that will access all 4 metal layers at the same point? Can you be more specific please?

D.
 

Re: Antenna Effect

vbhupendra said:
keep M1 to poly area minimum
Click to expand...

if the M2 which is connected to M1 connecting the poly is large area, keeping the M1 area minimum is not enough
 

Re: Antenna Effect

Antenna Effect only occur when you connect gate oxide with large area of metal one.

 

Re: Antenna Effect

thanks guys for your valuable suggessions

hi xread
could you pls tell me how to connect reverse biased diode
regards
analaout
 

Re: Antenna Effect

connect the diode to the input of the gate and other end to ground. You have specific layers for drawing diode layout...varies from company to company. the most simplest of all is to make it similar to a substrate device....have a diffusion with two contacts and connect the contacts of the diode to the input poly through metal 1. the diode is a NDIODE...well as far as i know, all the input signals in a IP should be connected to diodes to nullify the effect of antenna condition...
 

Antenna Effect

Antenna effect, in fabrication, is the acummulation of charges which can break the gate oxide. If you understand this effect, you would know why ppl putting higher level metals (so-called metal jumping) or putting a reversed biased diode at the input gate node to release charges at the POLY to prevent it from breaking down.
When u ask this question, always pls check with foundry first as there are already lots of guidelines for you to understand the situation. Also, it really depends on if you run custom layout or place and route. Different methodolgies will have different consideration. Just specify a simple situation will not help you to solve the problem in this forum.
 

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