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PIC18, eeprom data are erased from emulator during download

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alexxx

alexxx

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Hello!

I wrote some data in eeprom, but each time I download a program from the debugger, those data are erased (values=0xFF). I need those data to be retained. I searched, the emulator settings but still no luck. I use Mplab X v3.40 with ICD3 emulator and the MCU is a PIC18F25K20. I tried all the combinations with the three settings seen below, but the result is always the same: the program is compiled OK, but during download I get the below error. For a 1-2 settings combinations, the code is downloaded, but the eeprom data are not retained. So how can those data remain inside eeprom, until the application itself (and not the emulator) erase them? Thanks in advance.

mplabX_5.pngmplabX_6.png
 

Hi,

it seems your programmer programs EEPROM data.

What locations does it program? There will be an EEPROM data file.

Klaus
 
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    alexxx

    alexxx

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In general, compilers provide directives for programming user defined values on EEPROM. I guess this settings supersede the IDE configuration, but you could check on your code if there could be happening conflict on both.
 
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    alexxx

    alexxx

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Try on real hardware - simulators can be useful in some circumstances but often just introduce another layer of bugs.
Susan
 

Try on real hardware
Click to expand...
Since I am talking about emulator and code download, the hardware is real.


What locations does it program? There will be an EEPROM data file.
Click to expand...
It programms locations 0 to 7. I wonder where would that file be. I opened all the project directories (build, debug, dist, nbproject) and searched inside all the files using the keyword "eeprom", but did not understood if one of them is the eeprom file.

I guess this settings supersede the IDE configuration, but you could check on your code if there could be happening conflict on both.
Click to expand...
Using the eeprom keyword, those memories are written perfectly with the desired values. For example by using this line
Code: 
__EEPROM_DATA(0x02, 0x00, 0x01, 0xC2, 0x00, 0x01, 0x18, 0xC2); // 00
then after program download, those memories are written with those values. Then I comment out this line and download code again. The same addresses are now 0xFF, although the "preserve eeprom data" checkbox is checked...
 

Please post your circuit and also C project files zipped. I will test it with my ICD3.
 

Isn't the programmer acting exactly as expected ? According to the picture you attached in post #1, there you are instructing it to erase the program, which means write 0xFF to all adresses:

broken link removed
Click to expand...
 
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    alexxx

    alexxx

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As mentioned by andre_teprom you have to uncheck the "Erase All Before Program" option and try.
 
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    alexxx

    alexxx

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According to the picture you attached in post #1, there you are instructing it to erase the program, which means write 0xFF to all adresses:
Click to expand...
Sorry for the misunderstanding. As I already said I tried all the combinations. The problem is that as soon as I deactivate the "Erase all before program" option, then I get the error shown in post #1. It compiles OK, but before download, this error is thrown and it won't let me download the program. The image shows a random selection of those three options, at the specific time I took the snapshot.
 

Show me the #pragma config settings. I think you have locked the eeprom data.
 
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    alexxx

    alexxx

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That was a good thought but no, it is not locked. In any case, here are all the configuration settings.

Code: 
//Configuration parameters
#pragma config FOSC = INTIO67     // Oscillator Selection bits (HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1))
#pragma config FCMEN = OFF      // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled)
#pragma config IESO = OFF       // Internal/External Oscillator Switchover bit (Oscillator Switchover mode disabled)

// CONFIG2L
#pragma config PWRT = OFF       // Power-up Timer Enable bit (PWRT disabled)
#pragma config BOREN = SBORDIS  // Brown-out Reset Enable bits (Brown-out Reset enabled in hardware only (SBOREN is disabled))
#pragma config BORV = 22        // Brown Out Reset Voltage bits (VBOR set to 2.2 V nominal)

// CONFIG2H
#pragma config WDTEN = OFF      // Watchdog Timer Enable bit (WDT is controlled by SWDTEN bit of the WDTCON register)
#pragma config WDTPS = 32       // Watchdog Timer Postscale Select bits (1:32)

// CONFIG3H
#pragma config CCP2MX = PORTC   // CCP2 MUX bit (CCP2 input/output is multiplexed with RC1)
#pragma config PBADEN = OFF     // PORTB A/D Enable bit (PORTB<4:0> pins are configured as digital I/O on Reset)
#pragma config LPT1OSC = OFF    // Low-Power Timer1 Oscillator Enable bit (Timer1 configured for higher power operation)
#pragma config HFOFST = OFF     // HFINTOSC Fast Start-up (The system clock is held off until the HFINTOSC is stable.)
#pragma config MCLRE = ON       // MCLR Pin Enable bit (MCLR pin enabled; RE3 input pin disabled)

// CONFIG4L
#pragma config STVREN = ON      // Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset)
#pragma config LVP = OFF        // Single-Supply ICSP Enable bit (Single-Supply ICSP disabled)
#pragma config XINST = OFF      // Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled (Legacy mode))

// CONFIG5L
#pragma config CP0 = OFF        // Code Protection Block 0 (Block 0 (000800-001FFFh) not code-protected)
#pragma config CP1 = OFF        // Code Protection Block 1 (Block 1 (002000-003FFFh) not code-protected)
#pragma config CP2 = OFF        // Code Protection Block 2 (Block 2 (004000-005FFFh) not code-protected)
#pragma config CP3 = OFF        // Code Protection Block 3 (Block 3 (006000-007FFFh) not code-protected)

// CONFIG5H
#pragma config CPB = OFF        // Boot Block Code Protection bit (Boot block (000000-0007FFh) not code-protected)
#pragma config CPD = OFF        // Data EEPROM Code Protection bit (Data EEPROM not code-protected)

// CONFIG6L
#pragma config WRT0 = OFF       // Write Protection Block 0 (Block 0 (000800-001FFFh) not write-protected)
#pragma config WRT1 = OFF       // Write Protection Block 1 (Block 1 (002000-003FFFh) not write-protected)
#pragma config WRT2 = OFF       // Write Protection Block 2 (Block 2 (004000-005FFFh) not write-protected)
#pragma config WRT3 = OFF       // Write Protection Block 3 (Block 3 (006000-007FFFh) not write-protected)

// CONFIG6H
#pragma config WRTC = OFF       // Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) not write-protected)
#pragma config WRTB = OFF       // Boot Block Write Protection bit (Boot Block (000000-0007FFh) not write-protected)
#pragma config WRTD = OFF       // Data EEPROM Write Protection bit (Data EEPROM not write-protected)

// CONFIG7L
#pragma config EBTR0 = OFF      // Table Read Protection Block 0 (Block 0 (000800-001FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR1 = OFF      // Table Read Protection Block 1 (Block 1 (002000-003FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR2 = OFF      // Table Read Protection Block 2 (Block 2 (004000-005FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR3 = OFF      // Table Read Protection Block 3 (Block 3 (006000-007FFFh) not protected from table reads executed in other blocks)

// CONFIG7H
#pragma config EBTRB = OFF      // Boot Block Table Read Protection bit (Boot Block (000000-0007FFh) not protected from table reads executed in other blocks)
 

MPLABX version ? Maybe a bug of MPLABX. Update to latest version of MPLABX and try.
 

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