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How to create lookup table for sin(4(pi)x) in VHDL?

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rajeswari01

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hi,
how to create lookuptable for sin(4(pi)x) and cos(20(pi)x) in VHDL, The x range is -4 :1/32:4... i.e., 256 values..Anyone help me...
 

Mostly MATLAB is used in such cases.....you write a simple MATLAB code to get these sin & cos values then in Xilinx (hope you are using xilinx) instantiate LUT or Block RAM to store these values.
 

One possible way is to calculate the table in VHDL at compile time, as shown in the below example. (It's a 0..pi sine table, not the solution for your problem).

Code: 
TYPE SINTAB IS ARRAY(0 TO ROMSIZE-1) OF STD_LOGIC_VECTOR (NNCO-2 DOWNTO 0);
SIGNAL SINROM: SINTAB;

BEGIN

GENROM:
FOR idx in 0 TO ROMSIZE-1 GENERATE
	CONSTANT x: REAL := SIN(real(idx)*MATH_PI/real(ROMSIZE));
	CONSTANT xn: UNSIGNED (NNCO-2 DOWNTO 0) := CONV_UNSIGNED(INTEGER(x*real(ROMMAX)),NNCO-1);
BEGIN
	SINROM(idx) <= STD_LOGIC_VECTOR(xn);	
END GENERATE;
 

Why not do similar to FvM's idea, but do the setup inside a function, that way you can assign a constant instead of a signal.

Also, have a look into the fixed point packages so you dont have to keep remembering where the fractional bits are when you store the values in an unsigned.
 

but do the setup inside a function, that way you can assign a constant instead of a signal
Click to expand...
A function is possibly the more flexible way, and doesn't rely on rarely used VHDL constructs that are mostly ignored by text books.

The difference between a signal and a constant doesn't matter for the actual LUT implementation. My example will usually cause ROM inference, when supported by the respective hardware, and not explicitely prohibited in the compiler settings, and a LUT in logic cells otherwise. The same can be expected for a functions supplying constant values.

You don't necessarily need a full fixed point package, but you should understand how the sine range of -1.0 .. + 1.0 can be represented by integer numbers. It's mostly a question of your overall design, what the table values are used for.
 

hi,
Thanks for all ....

---------- Post added at 12:18 ---------- Previous post was at 12:09 ----------

actually, the equation is f(x) = 21.5 + x sin(4πx) + x cos(20πx). the x range is -4 to +4, find the maximum value of this equation ...The maximum value is 28.25... shall write vhdl code for this equation ...is it posssible to show 28.25 in an output(xilinx)?
 

sorry..How 28.25 represented in binary? what method use?
 

You can use whatever representation you want - usually people stick with floating or fixed point. You could use that equation to generate a look up table in VHDL quite easily, but you have to decide if you want fixed point or floating point for the output. The input (X) will have to be fixed point.
 

TrickyDicky said:
You can use whatever representation you want - usually people stick with floating or fixed point. You could use that equation to generate a look up table in VHDL quite easily, but you have to decide if you want fixed point or floating point for the output. The input (X) will have to be fixed point.
Click to expand...

is it possible to do in floating point for both input and output?
 

Output yes.
Input - you cannot do full precision (32 bit) floating point as this would require a 4GB look up table. You can reduce exponent and mantissa width to something more sensible to reduce the look up table size (total max 20 bits on large expensive FPGA devices). But generally, no. Its easier to stick with fixed point.
 

In theroetically, for input X= -3.6563 coresponding to output y is 28.25..How is show this output in xilinx and FPGA KIT?

---------- Post added at 12:38 ---------- Previous post was at 12:29 ----------

is it possible in VHDL?
 

It seems to me, that a 8-Bit fixed point representation is already suggested by the exercise text, e.g. 3.5 for x and 6.2 for y. The objective is apparently to show the principle method, not to achieve high accuracy.
 

both values can easily (or very closly) be represented in 8 bit fixed point.
 

ok.. for x is -1 and 1 ..the value of sin(4(pi)x) is '0'...sinn(pi)is '0'.for all value of x ..sin value '0'.. then how proceed?
 

A fixed point table for sin(4 pi x) with 8 bit fixed point signed values would look like this
Code: 
xi     x   sin(4pi x) sin_4pix_i
-128 -4.000  0           0
-127 -3.969  0.098      13
...
-112 -3.500  1.000      127 (saturated)
...
-1   -0.031 -0.098     -13
0     0.000  0.000       0
...
+127  3.969 -0.098     -13
If not utilizing VHDL to calculate it, as previously suggested, use a spread sheet calculator.
 

How did calculate? how did take range?
 

The scaling for x is already suggested in the original post. The y scaling is obvious by the sin() range.
 

Here is how I do it using Python to generate the table, using an initialized Xilinx RAM64X1S to hold the values. It is in Verilog, but converting it to VHDL should be easy.

RAM64X1S as a sine wave ROM
 

Thanks..How to convert -3.9688 into 8-bit binary number?
 

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