in modelsim error "Failed to parse SDF file"

too many inherited module instance parameters

Hi, all,
I met a strange problem.
First, I generate an sdf file using design compiler of synopsys "mips_struct.sdf" and structural file mips_struct.v.
Second, I use "vsim work.top -novopt -sdftyp /top/dut=mips_struct.sdf" in modelsim.
However, I get an error message:

>vsim work.top -novopt -sdftyp /top/dut=mips_struct.sdf
# vsim -sdftyp /top/dut=mips_struct.sdf -novopt work.top
# Loading work.top
# Loading work.mips
# Loading work.controller
# Loading work.alucontrol
# Loading work.datapath
# Loading work.mux2
# Loading work.flopen
# Loading work.flopenr
# Loading work.flop
# Loading work.mux4
# Loading work.regfile
# Loading work.alu
# Loading work.zerodetect
# Loading work.exmemory
# ** Error: (vsim-SDF-3250) mips_struct.sdf(18): Failed to find INSTANCE '/top/dut/U1262'.
# ** Error: (vsim-SDF-3250) mips_struct.sdf(19): Failed to find INSTANCE '/top/dut/U1262'.
# ** Error: (vsim-SDF-3250) mips_struct.sdf(20): Failed to find INSTANCE '/top/dut/U1262'.
# ** Error: (vsim-SDF-3250) mips_struct.sdf(21): Failed to find INSTANCE '/top/dut/U1261'.
# ** Error: (vsim-SDF-3250) mips_struct.sdf(22): Failed to find INSTANCE '/top/dut/U1261'.
# ** Warning: (vsim-SDF-3432) mips_struct.sdf: This file is probably applied to the wrong instance.
# Ignoring subsequent missing instances from this file.
# ** Warning: (vsim-SDF-3441) mips_struct.sdf: Failed to find 3179 out of the 3180 instances from this file.
# ** Error: (vsim-SDF-3445) Failed to parse SDF file "mips_struct.sdf".
# Time: 0 ps Iteration: 0 Region: /top File: /home/lv/Desktop/modelsim/mips-test.v

Do you have ideas about this problem?

failed to parse sdf file

do ou compile the sdf file in modelsim? search for sdfcom command in modelsim to compile the sdf file.

modelsim failed to find instance

Well, i still have no idea for the question.
I have an sdf file and structural file. How can I use them in modelsim to simulate.

Many thanks.

failed to find sdf file

from your first post, i can see that u have a list of structural design file like top, mips , controller, alucontrol, and etc. i assume those are verilog or vhdl files.

the SDF file should be used together with the netlist and the netlist will replace all your design files for timing simulation.

as usual, all file need to be compile before the modelsim can used them.
the netlist and all design file can be compile using the vlog or vcom command.
if u are doing behavioural simulation, only the design file need to be compile.
if u are doing timing simulation or gate level simulation, the only the netlist e compile and the netlist will be replace all your design files.

for SDF file, sdfcom is used for sdf file compilation.

after all files and library had been compile than only u load the sdf file to your design unit shown as "vsim work.top -novopt -sdftyp /top/dut=mips_struct.sdf" in modelsim.

sdf-3250

Yes, you are right.
this is my flow:
1. compile testbench.v and mips_struct.v
these two files are all verilog files. mips_struct.v is generated by design compiler. mips_sturct.v is a structural file.

2: compile mips_struct.sdf file which is generated by design compiler
sdfcom mips_struct.sdf mips_struct_output.sdf

3: vsim -novopt -sdftyp /top/dut/=mips_struct.sdf work.top

after that, however, there are a lot of errors.

like this:
Error: (vsim-3033) /home/lv/Desktop/modelsim/mips_struct.v(100): Instantiation of 'DFFX1' failed. The design unit was not found.
# Region: /top/dut
# Searched libraries:
# /home/lv/Desktop/modelsim/work

and here "DFFX1" is the name of DFF in my library(mips_lib.db file)

So, should I compile this library file? and how to compile it?

many thanks

Added after 35 minutes:

when the gate level above fails, i do the register level simulation, however, it generates the following errors.
---------------------------------------------------------------------------------------------------------------
# ** Error: (vsim-SDF-3250) mips_struct.sdf(18): Failed to find INSTANCE '/top/dut/U853'.
# ** Error: (vsim-SDF-3250) mips_struct.sdf(19): Failed to find INSTANCE '/top/dut/U852'.
# ** Error: (vsim-SDF-3250) mips_struct.sdf(20): Failed to find INSTANCE '/top/dut/U851'.
# ** Error: (vsim-SDF-3250) mips_struct.sdf(21): Failed to find INSTANCE '/top/dut/U851'.
# ** Error: (vsim-SDF-3250) mips_struct.sdf(22): Failed to find INSTANCE '/top/dut/U850'.
# ** Warning: (vsim-SDF-3432) mips_struct.sdf: This file is probably applied to the wrong instance.
# Ignoring subsequent missing instances from this file.
# ** Warning: (vsim-SDF-3441) mips_struct.sdf: Failed to find 2831 out of the 2832 instances from this file.
# ** Error: (vsim-SDF-3445) Failed to parse SDF file "mips_struct.sdf".
# Time: 0 ps Iteration: 0 Region: /top File: /home/lv/Desktop/modelsim/mips-test.v
---------------------------------------------------------------------------------------------------------------

and this is part of my sdf file.
(DELAYFILE
(SDFVERSION "OVI 1.0")
(DESIGN "mips")
(DATE "Thu Dec 11 20:00:56 2008")
(VENDOR "foo")
(PROGRAM "Synopsys Design Compiler cmos")
(VERSION "Z-2007.03-SP4")
(DIVIDER /)
(VOLTAGE 5.00:5.00:5.00)
(PROCESS)
(TEMPERATURE 25.00:25.00:25.00)
(TIMESCALE 1ns)
(CELL
(CELLTYPE "mips")
(INSTANCE)
(DELAY
(ABSOLUTE
(INTERCONNECT U384/Y U853/A (0.000:0.000:0.000))
(INTERCONNECT U378/Y U852/A (0.000:0.000:0.000))
(INTERCONNECT U721/Y U851/A (0.000:0.000:0.000))
(INTERCONNECT U797/Y U851/B (0.000:0.000:0.000))

U853,U852,U851 are indeed in the sdf file. I do not know why it said cannot find them.

many thanks.

Added after 54 minutes:

Oooo, sorry, guys.
I made a mistake. I used the old sdf file instead the compiled sdf file.
vsim -novopt -sdftyp /top/dut/=mips_struct.sdf
I should use:
vsim -novopt -sdftyp /top/dut/=mips_struct_out.sdf

Now, all the errors are gone. But there is still another critical problem.

here is the error messages:

vsim -novopt -sdftyp /top/dut/=mips_struct_out.sdf work.top
# vsim -sdftyp /top/dut/=mips_struct_out.sdf -novopt work.top
# Loading work.top
# Loading work.mips
# ** Warning: (vsim-3009) [TSCALE] - Module 'mips' does not have a `timescale directive in effect, but previous modules do.
# Region: /top/dut
# Loading work.DFFX1
# ** Warning: (vsim-3009) [TSCALE] - Module 'DFFX1' does not have a `timescale directive in effect, but previous modules do.
# Region: /top/dut/dp_mdr_q_reg_0_
# Loading work.AOI4
# ** Warning: (vsim-3009) [TSCALE] - Module 'AOI4' does not have a `timescale directive in effect, but previous modules do.
# Region: /top/dut/U2
# Loading work.OAI3
# ** Warning: (vsim-3009) [TSCALE] - Module 'OAI3' does not have a `timescale directive in effect, but previous modules do.
# Region: /top/dut/U3
# Loading work.NOR2X1
# ** Warning: (vsim-3009) [TSCALE] - Module 'NOR2X1' does not have a `timescale directive in effect, but previous modules do.
# Region: /top/dut/U155
# Loading work.NAND3X1
# ** Warning: (vsim-3009) [TSCALE] - Module 'NAND3X1' does not have a `timescale directive in effect, but previous modules do.
# Region: /top/dut/U158
# Loading work.INVX4
# ** Warning: (vsim-3009) [TSCALE] - Module 'INVX4' does not have a `timescale directive in effect, but previous modules do.
# Region: /top/dut/U153
# Loading work.NAND2X2
# ** Warning: (vsim-3009) [TSCALE] - Module 'NAND2X2' does not have a `timescale directive in effect, but previous modules do.
# Region: /top/dut/U175
# Loading work.NAND2X1
# ** Warning: (vsim-3009) [TSCALE] - Module 'NAND2X1' does not have a `timescale directive in effect, but previous modules do.
# Region: /top/dut/U166
# Loading work.INVX1
# ** Warning: (vsim-3009) [TSCALE] - Module 'INVX1' does not have a `timescale directive in effect, but previous modules do.
# Region: /top/dut/U414
# Loading work.BUFX8
# ** Warning: (vsim-3009) [TSCALE] - Module 'BUFX8' does not have a `timescale directive in effect, but previous modules do.
# Region: /top/dut/U715
# Loading work.BUFX4
# ** Warning: (vsim-3009) [TSCALE] - Module 'BUFX4' does not have a `timescale directive in effect, but previous modules do.
# Region: /top/dut/U772
# Loading work.TIEHI
# ** Warning: (vsim-3009) [TSCALE] - Module 'TIEHI' does not have a `timescale directive in effect, but previous modules do.
# Region: /top/dut/U806
# ** Error: (vsim-3006) /home/lv/Desktop/modelsim/mips-test.v(10): Too many inherited module instance parameters.
# Region: /top
# Loading work.exmemory
# Error loading design
-----------------------------------------------------

contents of exmemory module:
module exmemory #(parameter WIDTH=8)
(input clk,
input memwrite,
input [WIDTH-1:0] adr,writedata,
output reg [WIDTH-1:0] memdata);

reg [31:0] RAM [(1<<WIDTH-2)-1:0];
wire [31:0] word;

initial
begin
$readmemh("memfile.dat",RAM);
end

always@(posedge clk)
if(memwrite)
case(adr[1:0])
2'b00: RAM[adr>>2][31:24]<=writedata;
2'b01: RAM[adr>>2][23:16]<=writedata;
2'b10: RAM[adr>>2][15:8]<=writedata;
2'b11: RAM[adr>>2][7:0]<=writedata;
endcase

assign word=RAM[adr>>2];
always@(*)
case(adr[1:0])
2'b00: memdata <=word[7:0];
2'b01: memdata <=word[15:8];
2'b10: memdata <=word[23:16];
2'b11: memdata <=word[31:24];
endcase
endmodule

compiled sdf modelsim

u try add "-t ps" in your vsim command and try

modelsim compile sdf file

seems like u r using a student version of modelsim...
the timescale directive is different in ur testbench and in ur netlist file.
just add the correct timescale in ur top level file tat u simulate(ur tb top) and it should apply to the leaf levels also unless they are described there.
make sure u r compiling ur library(say 65nm.v file) along with ur netlist....
just a suggestion.
a part of ur sdf contains 0 delays(00:00:00)
make sure u got ur sdf right....


Regards
Srinivas