Series string of inductors for use as an inductor in an SMPS?

Regarding using inductors in series for an SMPS power inductor.....

Post #3 of this thread.....
https://www.edaboard.com/threads/295809/
says....

One possible problem with series inductors is the midpoint ringing a lot due to the self resonance of the inductors. If this is a problem then damping it with a RC snubber network may be necessary.

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Surely a single inductor would have stray capacitance too?....so is the ringing really a particular problem for series inductor chains?

Normally a single inductor will have both its terminals clamped to a very low impedance at any given time during a switching cycle, which suppresses ringing at its terminals. With two or more series inductors, the "middle" terminals will not be clamped in such a way.

As to the extent of the ringing, that depends on specifics. If the inductors are identical and theirs no significant parasitic capacitance at the middle points, then it will be quiet. But if the inductors have dissimilar properties, or the pad capacitance is large, you may see multiple resonant frequencies excited.

Thanks, well the simulation attached prooves you right.
Still i am not sure if the spikes of current seen in the FET are really going to do any harm.
Admittedly they are going to cause extra switching losses.
But we have a low profile enclosure (10mm height), and we just cant fit any off the shelf formers into it.....so its gotta be three series offtheshelf inductors or nothing.

three of these 220uH by wurth..
https://katalog.we-online.de/pbs/datasheet/7447709221.pdf

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The three 7447709221 220uH inductors would each have AC losses of 693mW in the application (150W PFC).
We got that from REDexpert, the wurth inductor tool.
This is high but i wonder if we could heatsink it by having thermal vias in the inductors pad, going down to the earthed heatsink?
693mW of AC losses does sound a lot for a 12mmx12mm x 10mm high inductor.

The inductor self resonance doesn't show significantly in the transistor current and voltage waveform. I guess, with current spikes you are referring to the PFC diode reverse recovery current in CCM? It's not related to inductor self resonance.

Regarding model parameters, I notice that the datasheet SRF specification suggests a parallel capacitance of 15 rather 100 pF.

I wouldn't expect the FET/diode current to be substantially different due to the excited resonance. The main concern is EMC issues due to coupling from that node to nearby circuits. I've seen one case where this was a problem, it really depends on the bigger picture.

Thanks , do you think its best to use inductors in parallel (rather than the series inductors chain) on the basis that one then avoids the high impednace intermediate node etc?
Just to note, we must use offtheshelf surface mount inductors of height <11mm. We have no choice in this.
We havent the money for a custom former, and as you know all offtheshelf formers are >11mm in height.

The MSS1278T range of offtheshelf SMD inductors appears (according to the coilcraft web calculator compared to the wurth web calculator) to have less core losses than the wurth WE-PD range.
However, the following attached shows the core losses for coilcraft MSS1278T-224 (220uH) at 100khz being less than at 90khz.......is this likely to be correct? (the graph is from the coilcraft web core loss calculator tool)

MSS1278T-224 inductor
https://www.coilcraft.com/pdfs/mss1278t.pdf

Also, Do you think we need to have RC dampers across each inductor in order to damp ringing, since the middle of the three inductors is "seeing" high Z in either direction?

I wouldn't expect the FET/diode current to be substantially different due to the excited resonance

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Thanks yes i agree, but the spikes of current at FET switch ON are those spikes coming through the RC dampers which exist across each of the series inductors.
I am not speaking here about the spikes of current which come through the reverse recovering boost diode.

but the spikes of current at FET switch ON are those spikes coming through the RC dampers which exist across each of the series inductors.
I am not speaking here about the spikes of current which come through the reverse recovering boost diode.

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Reverse recovery and capacitor spike happen at the same time, reverse recovery current magnitude is a large multiple of the latter. In so far it sounds a bit arbitrary to worry about the capacitor spike. As already mentioned, your simulation model uses an unrealistic high inductor parallel capacitance, respectively the snubber dimensioning can be corrected. Don't know if the point still matters after that.

Reverse recovery and capacitor spike happen at the same time, reverse recovery current magnitude is a large multiple of the latter. In so far it sounds a bit arbitrary to worry about the capacitor spike. As already mentioned, your simulation model uses an unrealistic high inductor parallel capacitance, respectively the snubber dimensioning can be corrected. Don't know if the point still matters after that.

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Thanks, the thing is, the diode’s reverse recovery spikes don’t flow in the sense resistor, as we can see from the attached PFC schematic (LTspice simulation also attached).
In this simulation , I have reduced the three inductors’ parallel capacitances to 15pF. You can still see a lot of spike currents flowing, due to the spikes of current which come through the RC snubbers which lie across the inductors. (The spikes appear when the FET is turned on) This does make the mains input current waveform very slightly more noisy looking.
Do you believe that RC snubbers across the inductors is the right way to go?
Also, what if one inductor is 200uH, one is 240uH, and the other 220uH?......do you believe that we will get issues?
(I have never seen an SMPS with series inductors instead of a single bigger one in my life, and I wonder why people just don’t do it? I tell a lie, I once saw a PFC Boost for a flat-screen TV power supply App note which had two low profile inductors in series but that’s the only time ive ever seen it...and that was only an App Note which now seems to have been removed from the web....ominously)

The partial snubbers are only functional as far as the inductors expose an asymmetry, in any case the resistance should be adjusted according to characteristic LC resonator impedance, ending up in a factor 50 higher value.

Besides partial resonances with asymmetrical inductor values, you also get free-wheeling resonance in DCM, a respective snubber could be connected across the MOSFET or diode if you are worried about the oscillation.

Parallel or series combinations of multiple inductors are usually chosen as a last resort, if no suitable single device is available for a design. In so far you won't see it quite often.

A special problem is the possibly insufficient working voltage of boost inductors. The threefold series circuit is advantageous in this regard.

Besides partial resonances with asymmetrical inductor values, you also get free-wheeling resonance in DCM, a respective snubber could be connected across the MOSFET or diode if you are worried about the oscillation.

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Thanks, so regarding putting rc snubbers across the fet or diode, ..you dont see it as a problem that an rc snubber across the fet is shorted out and therefore non functional when the mosfet is turned on?......likewise an rc snubber across the diode when it is conducting.

treez said:

Thanks, so regarding putting rc snubbers across the fet or diode, ..you dont see it as a problem that an rc snubber across the fet is shorted out and therefore non functional when the mosfet is turned on?......likewise an rc snubber across the diode when it is conducting.

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Depends what exactly those snubbers were meant to snub... for example for a snubber placed across a FET to dampen very high frequency ringing due to parasitic inductance, the FET never really shorts out that snubber, due to those same parasitics. If that snubber was meant to dampen another parasitic resonance, then it should be moved to more effectively couple to those parasitics.

This topic is on my mind as I'm trying to solve similar problems.

In one application I'm considering series inductors to meet my inductance/current/mechanical constraints as well as alleviate voltage stress.

In another application I'm considering 4 inductors in a series/parallel combination to meet the current and form factor requirements.

My take from this thread is that its something to be avoided but not out of the question, is that fair? If I do it I'd minimize mid-point C in layout to try and prevent any ringing.

The parallel inductors application would suffer from current imbalance problems so I'd need reasonable thermal/saturation margin if I went that way.

Wouldn't parralel inductors mean physically larger inductors than one 660 uh inductor. For a total inductance of 660 uh wouldn't you have to use two 1320 uh inductors in parralel. Is this correct.

Not in theory because the total energy stored remains the same.

When you add a parallel inductor you do need to increase the inductance by a factor of 2 but the current goes down by a factor of 2 in each inductor as well. Current is squared in the energy formula (0.5LI^2) so the I^2 term goes down by 4 meaning your 1320uH inductor only needs to store half the energy.

Since size correlates best with energy stored the 1320uH inductor can be roughly half the size and the total solution size remains roughly the same.

Spend some time on coilcraft.com's big selector charts and you'll see that this is roughly true in real life.


In my case I'm considering it simply because real life part availability is limited and splitting the problem into multiple inductors gives me more mechanical flexibility.

In my case I'm considering it simply because real life part availability is limited and splitting the problem into multiple inductors gives me more mechanical flexibility.

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Thanks, yes same with us.
Some years ago there was an app note from one of the well known semiconductor companies which featured a pfc'd flat screen tv power supply with 2 inductors in series forming the boost pfc inductance. It was done because of the shallow height that exists in a flat screen tv.
For some reason, i just can't find this app not enow, and i wonder if it was a problem with the 2 inductors in series.
I think it was onsemi.com, but i can't really be sure...it may have been Fairchildsemi...then again..........i dont really remember.