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I am using Quectel SC200 in my design .Below is the description of it's antenna interface.
SC200E-CE/-EM/-NA and SC206E-EM/-NA provide four antenna interfaces for the main,
Rx-diversity,Wi-Fi/Bluetooth, and GNSS antennas respectively.
I understood all the other antenna specifications except...
Than you very much for your reply.
May I know which areas of analog IC design will have more demand in future.
Is analog IC design is saturated.
Read some articles which says future is analog computing.Links are given below .Please share your thoughts...
Dear Team,
May I know how to calculate a signals rise time from it's frequency.
I found this article for the same.
The formula given is Tr = 1/f*π.
May I know is this applicable for PWM also.
Dear Team,
May I know your thoughts about future of Analog IC design.
which area in analog IC design will have more demand in future (like data converters, Analog AI chips, etc)
What new analog IC’s do we need in 2026-2030 that we don’t have yet.
I heard like chips required for AI will have...
I am new to EMC testing and I need to find the below things from UNECE Regulation No 10.
I checked the UNECE Regulation No 10 documents but did not find anything.
I am sure my inexperience is troubling me.
Need to find the below information.
Particulars of the nominal value of the direct...
Thank you.
The decoupling path here I mean is Decoupling capacitor for Microcontroller VDD(Power supply rail)
The controller is placed in TOP and the Decoupling capacitors for this controllers VDD rail is present on bottom layer L6
I am debugging a 6 layer board for RE issue and the stackup is (S G G P+G G S).This is a 6 layer board.
The microcontroller is present in TOP(L1) layer and decoupling capacitor is placed in bottom layer(L6).
I was told that "When you decouple through vias, you are always going to get the IO...
I am using DS90UB928Q-Q1 in y design.The output of this IC will be connected to LCD.
The LCD has dedicated Horizontal Sync and Vertical Sync pins.
In the datasheet of DS90UB928Q-Q1 I can see that ,there is no dedicated pins for Horizontal Sync and Vertical Sync.
But in the datasheet I can see...
May I know can I connect multiple ferrite beads in series to improve the impedance.
As per my self study goal of the PoC filter is to make the impedance of the PoC delivery network much higher than the impedance of the 50-ohm transmission line so that the high speed signal edges don't "see"...
Thank you very much I will remove R790.
My maximum load current is 1A only.
The ferrite beads P/N is MPZ2012S102AT000(1 kOhms @ 100 MHz 1 Power Line Ferrite Bead 0805 (2012 Metric) 1.5A 150mOhm).
The two inductors are SRU2016-4R7Y(4.7 µH Shielded Drum Core, Wirewound Inductor 1.15 A 215mOhm...
I am using DS90UB925Q-Q1 5 serializer in my board and output of this board is connected to DS90UB926Q deserializer .The block diagram is given below.
As per theory I can send power along with the data lines(Power-over-Coax Design)
You can see my PoC network in the bottom of the image.
My...
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