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I was looking at the top of page 14 of 20 on the AD736 data sheet
https://www.analog.com/media/en/technical-documentation/data-sheets/AD736.pdf
It states that the 8k scaling resistor along with Cc determine the -3dB low frequency roll-off (FL). Then it proceeds to state that at this FL, the...
I know there are a few differences (for example LTSpice supports "ln" for log base e, but in pspice you have to use "log" for log base e), but I am a little confused on a couple of other things. One of them is the "B" sources. The LTSpice model I have has B sources like this:
I wasn't...
I have downloaded several models for SiC mosfets from Rohm and Cree, however I am wanting to use Hspice and these models are not compatible. Some of the obvious things are easy to change (like changes the { to ' ). These models use the .FUNC command to define a function, and then use it in...
That is a great point. If the Rf is 10k and the input capacitance is 12pf (amplifier + stray) then the time constant for that is 120ns (fc = 1.3MHz).
I can post the layout tomorrow.
I made a post in one of the forums and I can't find it. I then tried to post again and it said it was a duplicate. I search my posts and the new post doesn't show up. Is there a long delay before each post shows up?
I am using an AD8651 in a non-inverting unity gain configuration. I am running off of +5V and GND. The data sheet here:
https://www.analog.com/static/imported-files/data_sheets/AD8651_8652.pdf
indicates the GBW is 50MHz, the input bias current is 10pa and on page 9 shows the closed loop gain...
op amp level shift
I have a signal that is 0-4V and an ADC with 0-3V input. I was thinking I could have an inverting gain stage of -0.75 followed by another gain stage of -1. Or I could just use a resistor divider to divide the voltage down to 75% of its original value and then a buffer amp...
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