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I spent some time with this circuit, trying to tweak parameters for offset, kickback noise etc.
For a VDD of 0.8, I realized that when both inputs are like 751mV and 749mV, it could not charge neither OUTPB nor OUTNB enough to toggle the inverters. However, when it is 1.2V (just to...
Thank you. I actually use large mimcaps which dominate over the parasitic caps and, according to my design manual are quite robust against the temparature.
I also revised my simulations for mobility, vth, id and rdson and saw that id in fact decreases, and therefore, VVDD increases to pull Vov...
Good explanation in regards to cancelling what's happening with the transistors with a "non-ideal" biasing.
But the Vth of the transistors is also decreasing with temperature. And I simulated the ring oscillator running on an ideal supply voltage and its frequency increased with the...
I'm looking to minimize the frequency variation of an on-chip ring oscillator running at 2MHz, through using either an LDO as its supply voltage, or current-starving it with a current coming from a PTAT current source, coming from a constant-gm core
I simulated the ring oscillator with both...
Hello, all,
I'm learning HFSS and started with a simple patch antenna simulation designed for 10GHz. I used Balanis' dimensions (W=10mm, L=7.5mm) on a 31mil Rogers RO4350 substrate, extending it more than λ/4 beyond the patch (Wsub=Lsub=30mm). There is a ground plane underneath, and I seeded...
Hi all,
I recently started working on noise shaping SAR ADCs, and I'm learning the ADC starting from scratch.
I'm confused about the distinction (or lack thereof) between residue and quantization error.
In the context of pipeline ADCs, for example, the residue seems to be the amplified...
Thanks for your input. By floating I mean that the rectifier output is not connected to the rest of the circuit, but rather I supply a DC voltage to the rest of the circuit by having these two at different pins - which will normally be short-circuited in the standard operation.
I discussed with...
I did that and a few other tests.
I have interesting results to share.
First of all, as I said, when I lift the chip and there is nothing underneath it, it doesn't work. However, when I put it on top a book, it worked again. Not as good as when it was on top of the ESD mat, but still. I would...
My antenna is a simple loop. It does not radiate with a ground plane, so maybe when I lift the board, the antenna starts radiating or receiving. However, as I said, it goes to a rectifier whose output is floating so why would it affect the rest of the chip?
I have an RF energy harvester chip that I am testing at the moment. To control the charging (sleep) of a storage capacitor and the active period where it is connected to the communication/digital blocks; I use an hysteresis comparator. I test it currently without connecting the rectifier output...
Thanks for the answer but this leads me to a few questions:
1) Radiation resistance is not a physical resistance so how can the network analyzer measure it? Because it launches power and checks what goes back?
2) Please see my reply on Post #9 of this thread. I just elongated and made thicker...
Now that I exhausted matching sim setup to hardware, now I will look into matching hardware setup to the simulation with differential S11.
Thanks for all the help until now!
Applied your suggestions. Narrowing the port did not change much but changing the right-hand side of the feed much longer and thicker made a significant difference.
One critical difference I saw is that in my initial (balanced) case my radiation efficiency @3.5GHz was 35% with Re(Z11)=5ohms...
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