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Hello all,
I'm required to design a fully differential amplifier with CMFB.
the minimal requirements are:
Vdd=2 [v]
closed loop gain=2
Dynamic range at output, DR >80 [db]
settling error<0.5 mV
settling time<50 ns
load capacitance 10 pF
phase margin >60 degrees
power keeping low as possible
I...
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