Rules | Recent posts | topic RSS | Search | Register  | Log in

Need a positive feedback circuit design

 
Post new topic  Reply to topic    EDAboard.com Forum Index -> Analog IC Design & Layout
Author Message
aaronwlee



Joined: 21 Jun 2008
Posts: 15


Post28 Aug 2008 18:53   Need a positive feedback circuit design

Hi all, I need a positive feedback circuit design, the application is like this :

Monitor the voltage of one specified point (this point could be modeled as a capacitor) if the voltage of this point goes beyond a threshold (about 100mV) , the positive feedback circuit turns on, discharges the point with very large current, then the voltage of that point drops until the voltage is below the threshold, the positive feedback circuit turns off. Is it possible to implement this positive feedback circuit with MOS or bipolar process?

Thanks

Aaron
Back to top
LvW



Joined: 07 May 2008
Posts: 799
Helped: 152
Location: Germany


Post28 Aug 2008 19:12   Re: Need a positive feedback circuit design

Is there really only one common threshold for charging/discharging the capacitor ? Why do you restrict the design already to "positive feedback" circuits ?
Back to top
aaronwlee



Joined: 21 Jun 2008
Posts: 15


Post28 Aug 2008 19:47   Need a positive feedback circuit design

yes, in fact the specified number of the threshold is 100mV

if there is some circuit more than positive feedback that will be nice

The reson why I mentioned positive feedback is that this kind of circuit would generate very large current in a short time, which would help to discharge
Back to top
electronrancher



Joined: 24 Mar 2002
Posts: 474
Helped: 34


Post28 Aug 2008 21:34   Need a positive feedback circuit design

The simplest implementation is just a comparator with hysteresis. But the thresholds cannot be equal because you need a separation to make the positive feedback stable.

For example, you could use a comparator with 10mV hysteresis driving an NMOS that would quickly discharge the 100mV to 90mV and shut off.

But there is no positive feedback circuit that will sit at one stable operating point. The best you can do would be a high-gain op amp driving the same NMOS pull-down device. Now, if your voltage is below 100mV the NMOS gate will be pulled low. And as your voltage reaches 100mV the NMOS will be turned on stronger and stronger in order to prevent the value from exceeding 100mV.
Back to top
Post new topic  Reply to topic    EDAboard.com Forum Index -> Analog IC Design & Layout
Page 1 of 1 All times are GMT + 1 Hour


Abuse
Administrator
Moderators
topic RSS 
sitemap