Rules | Recent posts | topic RSS | Search | Register  | Log in

pipelined ADC

 
Post new topic  Reply to topic    EDAboard.com Forum Index -> Analog IC Design & Layout
Author Message
pbs681



Joined: 19 Aug 2004
Posts: 154
Helped: 11


Post27 Aug 2008 14:28   pipelined ADC

Hi all,

In pipelined ADC, we know that after quantization at the first stage, we convert back the digital signla to analog signal. And depending on the decision from comparator (ADC), if the output for that particular stage is 1, we will substract the re-converted analog signal with our sampled input. After that this residue will be amplified with gain of 2 (for 1.5 bit/perstage ADC). So, my question is that, why do we need to amplify the residue??

Thanks
Back to top
ricklin



Joined: 20 Feb 2006
Posts: 79
Helped: 9


Post27 Aug 2008 14:54   pipelined ADC

The residue range is only half of the full scale. if you don't amplify the residue, you need to implement an residue ADC the same SNR requirement of the full ADC, so what's the benefit for pipeline?
Back to top
Post new topic  Reply to topic    EDAboard.com Forum Index -> Analog IC Design & Layout
Page 1 of 1 All times are GMT + 1 Hour


Abuse
Administrator
Moderators
topic RSS 
sitemap