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leebluer
Joined: 20 Apr 2004
Posts: 60
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 26 Aug 2008 10:41 some question about LDO output capacitor |
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In papers, bigger output capacitor is used to achieve better Transient Character of LDO, most bigger than 2.2uF.
But in some product Application Notes, only 0.1uF output capacitor is enough for LDO. Is there any other structure? I have no idea about it.
If possible, please help me figure out.
Thanks in advance
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quaternion
Joined: 12 Nov 2006
Posts: 201
Helped: 11
Location: Cairo , Egypt
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| 26 Aug 2008 16:13 Re: some question about LDO output capacitor |
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| leebluer wrote: |
In papers, bigger output capacitor is used to achieve better Transient Character of LDO, most bigger than 2.2uF.
But in some product Application Notes, only 0.1uF output capacitor is enough for LDO. Is there any other structure? I have no idea about it.
If possible, please help me figure out.
Thanks in advance |
It depends on the in-hand LDO design & the acceptable range of transients...
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LvW
Joined: 07 May 2008
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Location: Germany
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| 26 Aug 2008 19:27 Re: some question about LDO output capacitor |
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| quaternion wrote: |
.........................
It depends on the in-hand LDO design & the acceptable range of transients... |
And, more than that, it depends on the characteristics of the whole circuit because this capacitor has a strong influence on loop gain frequency response and, thus, on the stability properties of the system.
And remember - very often this cap has to be combined with a small series resistor (sometimes its internal parasitic ESR resistor) because of stability reasons.
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leebluer
Joined: 20 Apr 2004
Posts: 60
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| 27 Aug 2008 1:51 Re: some question about LDO output capacitor |
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It seems Cout usually decide the dominant pole of LDO. Thus when little Cout is used, could LDO loop keep stable? In simulation, classic structure is hard to achieve the stability with 0.1uF Cout. Is there any other choice?
[quote="LvW"]
| quaternion wrote: |
.........................
It depends on the in-hand LDO design & the acceptable range of transients... |
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LvW
Joined: 07 May 2008
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Location: Germany
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| 27 Aug 2008 9:19 Re: some question about LDO output capacitor |
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Quote: Thus when little Cout is used, could LDO loop keep stable? In simulation, classic structure is hard to achieve the stability with 0.1uF Cout. Is there any other choice?
Another choice is to use an extra compensation circuitry around or in front of the error amplifier.
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leebluer
Joined: 20 Apr 2004
Posts: 60
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| 28 Aug 2008 3:36 Re: some question about LDO output capacitor |
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LvW, Thanks a lot.
Would you please explain more about 'use an extra compensation circuitry around or in front of the error amplifier'?
I know nothing about it. And if possible, could recommend some paper or others?
Thanks!
| LvW wrote: |
Quote: Thus when little Cout is used, could LDO loop keep stable? In simulation, classic structure is hard to achieve the stability with 0.1uF Cout. Is there any other choice?
Another choice is to use an extra compensation circuitry around or in front of the error amplifier. |
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ashish_chauhan
Joined: 02 Sep 2007
Posts: 233
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| 28 Aug 2008 4:48 Re: some question about LDO output capacitor |
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The structures which have lower output cap are called internally compensated LDOs. Most of the time in these ldos the second pole(o/p of error amp/buffer)
is made dominant. and care is taken to keep some distance between the o/p pole and second pole.
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LvW
Joined: 07 May 2008
Posts: 799
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Location: Germany
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| 28 Aug 2008 9:10 Re: some question about LDO output capacitor |
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| leebluer wrote: |
LvW, Thanks a lot.
Would you please explain more about 'use an extra compensation circuitry around or in front of the error amplifier'?
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The aim is to introduce a zero in the loop gain response.
This can be done with the help of an ESR of the output capacitance or by introducing a suitable network at another point within the loop. For example around the error amplifier.
In this context I attach two papers dealing with this subject.
Regards
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ashish_chauhan
Joined: 02 Sep 2007
Posts: 233
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| 28 Aug 2008 9:47 Re: some question about LDO output capacitor |
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The second one is more appealing .
Thanx LvW.!!
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quaternion
Joined: 12 Nov 2006
Posts: 201
Helped: 11
Location: Cairo , Egypt
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| 30 Aug 2008 12:21 Re: some question about LDO output capacitor |
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| LvW, did you try to implement the idea in the first attached paper ? , I tried to implement it before but I faced problems (same problems I posted in a topic about the inconsistent between transient & stability analysis http://www.edaboard.com/viewtopic.php?t=317350&highlight= ).
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LvW
Joined: 07 May 2008
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Helped: 152
Location: Germany
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| 30 Aug 2008 12:49 Re: some question about LDO output capacitor |
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| quaternion wrote: |
| LvW, did you try to implement the idea in the first attached paper ? |
No, I´m sorry, but I have no practical experience with the circuit you have mentioned.
(I even did not go into details of this paper and the described method).
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quaternion
Joined: 12 Nov 2006
Posts: 201
Helped: 11
Location: Cairo , Egypt
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| 14 Sep 2008 2:14 Re: some question about LDO output capacitor |
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| LvW wrote: |
| quaternion wrote: |
| LvW, did you try to implement the idea in the first attached paper ? |
No, I´m sorry, but I have no practical experience with the circuit you have mentioned.
(I even did not go into details of this paper and the described method). |
I have discovered that it is the same scheme used by imar here: http://www.edaboard.com/ftopic324192-0-asc-0.html
And there I have found a useful discussion about the stability & conditional stability 
thanks to LvW & ashish_chauhan.
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